| Submitter | Peter Crosthwaite |
|---|---|
| Date | Feb. 15, 2013, 4:51 a.m. |
| Message ID | <1fa8c88a3b7c654886d0a7484c2463cd4c2a2781.1360901435.git.peter.crosthwaite@xilinx.com> |
| Download | mbox | patch |
| Permalink | /patch/220625/ |
| State | New |
| Headers | show |
Comments
Patch
diff --git a/hw/cadence_gem.c b/hw/cadence_gem.c index ab86c17..e6032ea 100644 --- a/hw/cadence_gem.c +++ b/hw/cadence_gem.c @@ -1106,6 +1106,9 @@ static void gem_write(void *opaque, hwaddr offset, uint64_t val, /* Reset to start of Q when receive disabled. */ s->rx_desc_addr = s->regs[GEM_RXQBASE]; } + if (val & GEM_NWCTRL_RXENA) { + qemu_flush_queued_packets(qemu_get_queue(s->nic)); + } break; case GEM_TXSTATUS:
The device needs to check for queued RX packets when the RX path is re-enabled. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> --- hw/cadence_gem.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)