From patchwork Thu Feb 14 02:21:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [01/17] powerpc: Add new CPU feature bit for transactional memory Date: Wed, 13 Feb 2013 16:21:29 -0000 From: Michael Neuling X-Patchwork-Id: 220318 Message-Id: <1360808505-10086-2-git-send-email-mikey@neuling.org> To: Benjamin Herrenschmidt Cc: Michael Neuling , linuxppc-dev@lists.ozlabs.org, Matt Evans Signed-off-by: Matt Evans Signed-off-by: Michael Neuling --- arch/powerpc/include/asm/cputable.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index 5f1938f..3636081 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h @@ -220,6 +220,13 @@ extern const char *powerpc_base_platform; #define PPC_FEATURE_HAS_EFP_DOUBLE_COMP 0 #endif +/* We only set the TM feature if the kernel was compiled with TM supprt */ +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM +#define CPU_FTR_TM_COMP CPU_FTR_TM +#else +#define CPU_FTR_TM_COMP 0 +#endif + /* We need to mark all pages as being coherent if we're SMP or we have a * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II * require it for PCI "streaming/prefetch" to work properly.