diff --git a/arch/arm/include/asm/arch-tegra20/tegra20_spi.h b/arch/arm/include/asm/arch-tegra20/tegra20_spi.h
index 26a8402..6789881 100644
--- a/arch/arm/include/asm/arch-tegra20/tegra20_spi.h
+++ b/arch/arm/include/asm/arch-tegra20/tegra20_spi.h
@@ -27,16 +27,6 @@
 
 #include <asm/types.h>
 
-struct spi_tegra {
-	u32 command;	/* SPI_COMMAND_0 register  */
-	u32 status;	/* SPI_STATUS_0 register */
-	u32 rx_cmp;	/* SPI_RX_CMP_0 register  */
-	u32 dma_ctl;	/* SPI_DMA_CTL_0 register */
-	u32 tx_fifo;	/* SPI_TX_FIFO_0 register */
-	u32 rsvd[3];	/* offsets 0x14 to 0x1F reserved */
-	u32 rx_fifo;	/* SPI_RX_FIFO_0 register */
-};
-
 #define SPI_CMD_GO			(1 << 30)
 #define SPI_CMD_ACTIVE_SCLK_SHIFT	26
 #define SPI_CMD_ACTIVE_SCLK_MASK	(3 << SPI_CMD_ACTIVE_SCLK_SHIFT)
@@ -69,7 +59,4 @@ struct spi_tegra {
 #define SPI_STAT_SEL_TXRX_N		(1 << 16)
 #define SPI_STAT_CUR_BLKCNT		(1 << 15)
 
-#define SPI_TIMEOUT		1000
-#define TEGRA_SPI_MAX_FREQ	52000000
-
 #endif	/* _TEGRA20_SPI_H_ */
diff --git a/arch/arm/include/asm/arch-tegra30/tegra30_spi.h b/arch/arm/include/asm/arch-tegra30/tegra30_spi.h
index afa9b36..87a8169 100644
--- a/arch/arm/include/asm/arch-tegra30/tegra30_spi.h
+++ b/arch/arm/include/asm/arch-tegra30/tegra30_spi.h
@@ -27,21 +27,6 @@
 
 #include <asm/types.h>
 
-struct slink_tegra {
-	u32 command;	/* SLINK_COMMAND_0 register  */
-	u32 command2;	/* SLINK_COMMAND2_0 reg */
-	u32 status;	/* SLINK_STATUS_0 register */
-	u32 reserved;	/* Reserved offset 0C */
-	u32 mas_data;	/* SLINK_MAS_DATA_0 reg */
-	u32 slav_data;	/* SLINK_SLAVE_DATA_0 reg */
-	u32 dma_ctl;	/* SLINK_DMA_CTL_0 register */
-	u32 status2;	/* SLINK_STATUS2_0 reg */
-	u32 rsvd[56];	/* 0x20 to 0xFF reserved */
-	u32 tx_fifo;	/* SLINK_TX_FIFO_0 reg off 100h */
-	u32 rsvd2[31];	/* 0x104 to 0x17F reserved */
-	u32 rx_fifo;	/* SLINK_RX_FIFO_0 reg off 180h */
-};
-
 /* COMMAND */
 #define SLINK_CMD_ENB			(1 << 31)
 #define SLINK_CMD_GO			(1 << 30)
@@ -78,7 +63,4 @@ struct slink_tegra {
 #define SLINK_STAT2_RXF_FULL_CNT	(1 << 16)
 #define SLINK_STAT2_TXF_FULL_CNT	(1 << 0)
 
-#define SPI_TIMEOUT		1000
-#define TEGRA_SPI_MAX_FREQ	52000000
-
 #endif	/* _TEGRA30_SPI_H_ */
diff --git a/drivers/spi/tegra20_spi.c b/drivers/spi/tegra20_spi.c
index 9e5de68..d6567f8 100644
--- a/drivers/spi/tegra20_spi.c
+++ b/drivers/spi/tegra20_spi.c
@@ -36,15 +36,28 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define SPI_TIMEOUT		1000
+#define TEGRA_SPI_MAX_FREQ	52000000
+
 #if defined(CONFIG_SPI_CORRUPTS_UART)
  #define corrupt_delay()	udelay(CONFIG_SPI_CORRUPTS_UART_DLY);
 #else
  #define corrupt_delay()
 #endif
 
+struct spi_regs {
+	u32 command;	/* SPI_COMMAND_0 register  */
+	u32 status;	/* SPI_STATUS_0 register */
+	u32 rx_cmp;	/* SPI_RX_CMP_0 register  */
+	u32 dma_ctl;	/* SPI_DMA_CTL_0 register */
+	u32 tx_fifo;	/* SPI_TX_FIFO_0 register */
+	u32 rsvd[3];	/* offsets 0x14 to 0x1F reserved */
+	u32 rx_fifo;	/* SPI_RX_FIFO_0 register */
+};
+
 struct tegra_spi_slave {
 	struct spi_slave slave;
-	struct spi_tegra *regs;
+	struct spi_regs *regs;
 	unsigned int freq;
 	unsigned int mode;
 	int periph_id;
@@ -100,7 +113,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 		debug("%s: sflash is disabled\n", __func__);
 		return NULL;
 	}
-	spi->regs = (struct spi_tegra *)fdtdec_get_addr(gd->fdt_blob,
+	spi->regs = (struct spi_regs *)fdtdec_get_addr(gd->fdt_blob,
 							node, "reg");
 	if ((fdt_addr_t)spi->regs == FDT_ADDR_T_NONE) {
 		debug("%s: no sflash register found\n", __func__);
@@ -143,7 +156,7 @@ void spi_init(void)
 int spi_claim_bus(struct spi_slave *slave)
 {
 	struct tegra_spi_slave *spi = to_tegra_spi(slave);
-	struct spi_tegra *regs = spi->regs;
+	struct spi_regs *regs = spi->regs;
 	u32 reg;
 
 	/* Change SPI clock to correct frequency, PLLP_OUT0 source */
@@ -222,7 +235,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
 		const void *data_out, void *data_in, unsigned long flags)
 {
 	struct tegra_spi_slave *spi = to_tegra_spi(slave);
-	struct spi_tegra *regs = spi->regs;
+	struct spi_regs *regs = spi->regs;
 	u32 reg, tmpdout, tmpdin = 0;
 	const u8 *dout = data_out;
 	u8 *din = data_in;
diff --git a/drivers/spi/tegra30_spi.c b/drivers/spi/tegra30_spi.c
index 2d788e6..8f3dc8f 100644
--- a/drivers/spi/tegra30_spi.c
+++ b/drivers/spi/tegra30_spi.c
@@ -33,8 +33,26 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define SPI_TIMEOUT		1000
+#define TEGRA_SPI_MAX_FREQ	52000000
+
+struct spi_regs {
+	u32 command;	/* SLINK_COMMAND_0 register  */
+	u32 command2;	/* SLINK_COMMAND2_0 reg */
+	u32 status;	/* SLINK_STATUS_0 register */
+	u32 reserved;	/* Reserved offset 0C */
+	u32 mas_data;	/* SLINK_MAS_DATA_0 reg */
+	u32 slav_data;	/* SLINK_SLAVE_DATA_0 reg */
+	u32 dma_ctl;	/* SLINK_DMA_CTL_0 register */
+	u32 status2;	/* SLINK_STATUS2_0 reg */
+	u32 rsvd[56];	/* 0x20 to 0xFF reserved */
+	u32 tx_fifo;	/* SLINK_TX_FIFO_0 reg off 100h */
+	u32 rsvd2[31];	/* 0x104 to 0x17F reserved */
+	u32 rx_fifo;	/* SLINK_RX_FIFO_0 reg off 180h */
+};
+
 struct tegra_spi_ctrl {
-	struct slink_tegra *regs;
+	struct spi_regs *regs;
 	unsigned int freq;
 	unsigned int mode;
 	int periph_id;
@@ -128,8 +146,8 @@ void spi_init(void)
 		ctrl = &spi_ctrls[i];
 		node = node_list[i];
 
-		ctrl->regs = (struct slink_tegra *)fdtdec_get_addr(gd->fdt_blob,
-								   node, "reg");
+		ctrl->regs = (struct spi_regs *)fdtdec_get_addr(gd->fdt_blob,
+								node, "reg");
 		if ((fdt_addr_t)ctrl->regs == FDT_ADDR_T_NONE) {
 			debug("%s: no slink register found\n", __func__);
 			continue;
@@ -156,7 +174,7 @@ void spi_init(void)
 int spi_claim_bus(struct spi_slave *slave)
 {
 	struct tegra_spi_slave *spi = to_tegra_spi(slave);
-	struct slink_tegra *regs = spi->ctrl->regs;
+	struct spi_regs *regs = spi->ctrl->regs;
 	u32 reg;
 
 	/* Change SPI clock to correct frequency, PLLP_OUT0 source */
@@ -185,7 +203,7 @@ void spi_release_bus(struct spi_slave *slave)
 void spi_cs_activate(struct spi_slave *slave)
 {
 	struct tegra_spi_slave *spi = to_tegra_spi(slave);
-	struct slink_tegra *regs = spi->ctrl->regs;
+	struct spi_regs *regs = spi->ctrl->regs;
 
 	/* CS is negated on Tegra, so drive a 1 to get a 0 */
 	setbits_le32(&regs->command, SLINK_CMD_CS_VAL);
@@ -194,7 +212,7 @@ void spi_cs_activate(struct spi_slave *slave)
 void spi_cs_deactivate(struct spi_slave *slave)
 {
 	struct tegra_spi_slave *spi = to_tegra_spi(slave);
-	struct slink_tegra *regs = spi->ctrl->regs;
+	struct spi_regs *regs = spi->ctrl->regs;
 
 	/* CS is negated on Tegra, so drive a 0 to get a 1 */
 	clrbits_le32(&regs->command, SLINK_CMD_CS_VAL);
@@ -204,7 +222,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
 		const void *data_out, void *data_in, unsigned long flags)
 {
 	struct tegra_spi_slave *spi = to_tegra_spi(slave);
-	struct slink_tegra *regs = spi->ctrl->regs;
+	struct spi_regs *regs = spi->ctrl->regs;
 	u32 reg, tmpdout, tmpdin = 0;
 	const u8 *dout = data_out;
 	u8 *din = data_in;
