From patchwork Wed Feb 13 03:23:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen Martin X-Patchwork-Id: 220052 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 103B72C00DC for ; Wed, 13 Feb 2013 16:53:34 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8D5F44A182; Wed, 13 Feb 2013 06:53:18 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id I-ig8cTxfR+C; Wed, 13 Feb 2013 06:53:18 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 996AD4A183; Wed, 13 Feb 2013 06:52:13 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8D02D4A133 for ; Wed, 13 Feb 2013 06:52:01 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id WBo-7K-hxOtT for ; Wed, 13 Feb 2013 06:52:00 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from hqemgate03.nvidia.com (hqemgate03.nvidia.com [216.228.121.140]) by theia.denx.de (Postfix) with ESMTPS id 4A9674A13D for ; Wed, 13 Feb 2013 06:51:52 +0100 (CET) Received: from hqnvupgp05.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Tue, 12 Feb 2013 21:56:26 -0800 Received: from hqemhub01.nvidia.com ([172.20.150.30]) by hqnvupgp05.nvidia.com (PGP Universal service); Tue, 12 Feb 2013 21:51:46 -0800 X-PGP-Universal: processed; by hqnvupgp05.nvidia.com on Tue, 12 Feb 2013 21:51:46 -0800 Received: from badger.nvidia.com (172.20.144.16) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server id 8.3.297.1; Tue, 12 Feb 2013 19:23:48 -0800 From: Allen Martin To: , , Date: Tue, 12 Feb 2013 19:23:10 -0800 Message-ID: <1360725802-5518-4-git-send-email-amartin@nvidia.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1360725802-5518-1-git-send-email-amartin@nvidia.com> References: <1360725802-5518-1-git-send-email-amartin@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 03/14] tegra: spi: pull register structs out of headers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Move register structs from headers into .c files and use common name. This is in preparation of making common fdt front end for SPI drivers. Signed-off-by: Allen Martin --- arch/arm/include/asm/arch-tegra20/tegra20_spi.h | 13 --------- arch/arm/include/asm/arch-tegra30/tegra30_spi.h | 18 ------------- drivers/spi/tegra20_spi.c | 21 ++++++++++++--- drivers/spi/tegra30_spi.c | 32 ++++++++++++++++++----- 4 files changed, 42 insertions(+), 42 deletions(-) diff --git a/arch/arm/include/asm/arch-tegra20/tegra20_spi.h b/arch/arm/include/asm/arch-tegra20/tegra20_spi.h index 26a8402..6789881 100644 --- a/arch/arm/include/asm/arch-tegra20/tegra20_spi.h +++ b/arch/arm/include/asm/arch-tegra20/tegra20_spi.h @@ -27,16 +27,6 @@ #include -struct spi_tegra { - u32 command; /* SPI_COMMAND_0 register */ - u32 status; /* SPI_STATUS_0 register */ - u32 rx_cmp; /* SPI_RX_CMP_0 register */ - u32 dma_ctl; /* SPI_DMA_CTL_0 register */ - u32 tx_fifo; /* SPI_TX_FIFO_0 register */ - u32 rsvd[3]; /* offsets 0x14 to 0x1F reserved */ - u32 rx_fifo; /* SPI_RX_FIFO_0 register */ -}; - #define SPI_CMD_GO (1 << 30) #define SPI_CMD_ACTIVE_SCLK_SHIFT 26 #define SPI_CMD_ACTIVE_SCLK_MASK (3 << SPI_CMD_ACTIVE_SCLK_SHIFT) @@ -69,7 +59,4 @@ struct spi_tegra { #define SPI_STAT_SEL_TXRX_N (1 << 16) #define SPI_STAT_CUR_BLKCNT (1 << 15) -#define SPI_TIMEOUT 1000 -#define TEGRA_SPI_MAX_FREQ 52000000 - #endif /* _TEGRA20_SPI_H_ */ diff --git a/arch/arm/include/asm/arch-tegra30/tegra30_spi.h b/arch/arm/include/asm/arch-tegra30/tegra30_spi.h index afa9b36..87a8169 100644 --- a/arch/arm/include/asm/arch-tegra30/tegra30_spi.h +++ b/arch/arm/include/asm/arch-tegra30/tegra30_spi.h @@ -27,21 +27,6 @@ #include -struct slink_tegra { - u32 command; /* SLINK_COMMAND_0 register */ - u32 command2; /* SLINK_COMMAND2_0 reg */ - u32 status; /* SLINK_STATUS_0 register */ - u32 reserved; /* Reserved offset 0C */ - u32 mas_data; /* SLINK_MAS_DATA_0 reg */ - u32 slav_data; /* SLINK_SLAVE_DATA_0 reg */ - u32 dma_ctl; /* SLINK_DMA_CTL_0 register */ - u32 status2; /* SLINK_STATUS2_0 reg */ - u32 rsvd[56]; /* 0x20 to 0xFF reserved */ - u32 tx_fifo; /* SLINK_TX_FIFO_0 reg off 100h */ - u32 rsvd2[31]; /* 0x104 to 0x17F reserved */ - u32 rx_fifo; /* SLINK_RX_FIFO_0 reg off 180h */ -}; - /* COMMAND */ #define SLINK_CMD_ENB (1 << 31) #define SLINK_CMD_GO (1 << 30) @@ -78,7 +63,4 @@ struct slink_tegra { #define SLINK_STAT2_RXF_FULL_CNT (1 << 16) #define SLINK_STAT2_TXF_FULL_CNT (1 << 0) -#define SPI_TIMEOUT 1000 -#define TEGRA_SPI_MAX_FREQ 52000000 - #endif /* _TEGRA30_SPI_H_ */ diff --git a/drivers/spi/tegra20_spi.c b/drivers/spi/tegra20_spi.c index 9e5de68..d6567f8 100644 --- a/drivers/spi/tegra20_spi.c +++ b/drivers/spi/tegra20_spi.c @@ -36,15 +36,28 @@ DECLARE_GLOBAL_DATA_PTR; +#define SPI_TIMEOUT 1000 +#define TEGRA_SPI_MAX_FREQ 52000000 + #if defined(CONFIG_SPI_CORRUPTS_UART) #define corrupt_delay() udelay(CONFIG_SPI_CORRUPTS_UART_DLY); #else #define corrupt_delay() #endif +struct spi_regs { + u32 command; /* SPI_COMMAND_0 register */ + u32 status; /* SPI_STATUS_0 register */ + u32 rx_cmp; /* SPI_RX_CMP_0 register */ + u32 dma_ctl; /* SPI_DMA_CTL_0 register */ + u32 tx_fifo; /* SPI_TX_FIFO_0 register */ + u32 rsvd[3]; /* offsets 0x14 to 0x1F reserved */ + u32 rx_fifo; /* SPI_RX_FIFO_0 register */ +}; + struct tegra_spi_slave { struct spi_slave slave; - struct spi_tegra *regs; + struct spi_regs *regs; unsigned int freq; unsigned int mode; int periph_id; @@ -100,7 +113,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, debug("%s: sflash is disabled\n", __func__); return NULL; } - spi->regs = (struct spi_tegra *)fdtdec_get_addr(gd->fdt_blob, + spi->regs = (struct spi_regs *)fdtdec_get_addr(gd->fdt_blob, node, "reg"); if ((fdt_addr_t)spi->regs == FDT_ADDR_T_NONE) { debug("%s: no sflash register found\n", __func__); @@ -143,7 +156,7 @@ void spi_init(void) int spi_claim_bus(struct spi_slave *slave) { struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_tegra *regs = spi->regs; + struct spi_regs *regs = spi->regs; u32 reg; /* Change SPI clock to correct frequency, PLLP_OUT0 source */ @@ -222,7 +235,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, void *data_in, unsigned long flags) { struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_tegra *regs = spi->regs; + struct spi_regs *regs = spi->regs; u32 reg, tmpdout, tmpdin = 0; const u8 *dout = data_out; u8 *din = data_in; diff --git a/drivers/spi/tegra30_spi.c b/drivers/spi/tegra30_spi.c index 2d788e6..8f3dc8f 100644 --- a/drivers/spi/tegra30_spi.c +++ b/drivers/spi/tegra30_spi.c @@ -33,8 +33,26 @@ DECLARE_GLOBAL_DATA_PTR; +#define SPI_TIMEOUT 1000 +#define TEGRA_SPI_MAX_FREQ 52000000 + +struct spi_regs { + u32 command; /* SLINK_COMMAND_0 register */ + u32 command2; /* SLINK_COMMAND2_0 reg */ + u32 status; /* SLINK_STATUS_0 register */ + u32 reserved; /* Reserved offset 0C */ + u32 mas_data; /* SLINK_MAS_DATA_0 reg */ + u32 slav_data; /* SLINK_SLAVE_DATA_0 reg */ + u32 dma_ctl; /* SLINK_DMA_CTL_0 register */ + u32 status2; /* SLINK_STATUS2_0 reg */ + u32 rsvd[56]; /* 0x20 to 0xFF reserved */ + u32 tx_fifo; /* SLINK_TX_FIFO_0 reg off 100h */ + u32 rsvd2[31]; /* 0x104 to 0x17F reserved */ + u32 rx_fifo; /* SLINK_RX_FIFO_0 reg off 180h */ +}; + struct tegra_spi_ctrl { - struct slink_tegra *regs; + struct spi_regs *regs; unsigned int freq; unsigned int mode; int periph_id; @@ -128,8 +146,8 @@ void spi_init(void) ctrl = &spi_ctrls[i]; node = node_list[i]; - ctrl->regs = (struct slink_tegra *)fdtdec_get_addr(gd->fdt_blob, - node, "reg"); + ctrl->regs = (struct spi_regs *)fdtdec_get_addr(gd->fdt_blob, + node, "reg"); if ((fdt_addr_t)ctrl->regs == FDT_ADDR_T_NONE) { debug("%s: no slink register found\n", __func__); continue; @@ -156,7 +174,7 @@ void spi_init(void) int spi_claim_bus(struct spi_slave *slave) { struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct slink_tegra *regs = spi->ctrl->regs; + struct spi_regs *regs = spi->ctrl->regs; u32 reg; /* Change SPI clock to correct frequency, PLLP_OUT0 source */ @@ -185,7 +203,7 @@ void spi_release_bus(struct spi_slave *slave) void spi_cs_activate(struct spi_slave *slave) { struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct slink_tegra *regs = spi->ctrl->regs; + struct spi_regs *regs = spi->ctrl->regs; /* CS is negated on Tegra, so drive a 1 to get a 0 */ setbits_le32(®s->command, SLINK_CMD_CS_VAL); @@ -194,7 +212,7 @@ void spi_cs_activate(struct spi_slave *slave) void spi_cs_deactivate(struct spi_slave *slave) { struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct slink_tegra *regs = spi->ctrl->regs; + struct spi_regs *regs = spi->ctrl->regs; /* CS is negated on Tegra, so drive a 0 to get a 1 */ clrbits_le32(®s->command, SLINK_CMD_CS_VAL); @@ -204,7 +222,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, void *data_in, unsigned long flags) { struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct slink_tegra *regs = spi->ctrl->regs; + struct spi_regs *regs = spi->ctrl->regs; u32 reg, tmpdout, tmpdin = 0; const u8 *dout = data_out; u8 *din = data_in;