From patchwork Tue Feb 12 16:29:05 2013
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Subject: [31/32] arm: mvebu: PCIe Device Tree informations for Armada 370 DB
Date: Tue, 12 Feb 2013 06:29:05 -0000
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
X-Patchwork-Id: 219910
Message-Id: <1360686546-24277-32-git-send-email-thomas.petazzoni@free-electrons.com>
To: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org,
 linux-arm-kernel@lists.infradead.org
Cc: Lior Amsalem <alior@marvell.com>, Andrew Lunn <andrew@lunn.ch>,
 Russell King - ARM Linux <linux@arm.linux.org.uk>,
 Jason Cooper <jason@lakedaemon.net>, Arnd Bergmann <arnd@arndb.de>,
 Stephen Warren <swarren@wwwdotorg.org>,
 Thierry Reding <thierry.reding@avionic-design.de>,
 Eran Ben-Avi <benavi@marvell.com>, Nadav Haklai <nadavh@marvell.com>,
 Maen Suleiman <maen@marvell.com>, Shadi Ammouri <shadi@marvell.com>,
 Gregory Clement <gregory.clement@free-electrons.com>,
 Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
 Tawfik Bayouk <tawfik@marvell.com>

The Marvell evaluation board (DB) for the Armada 370 SoC has 2
physical full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

---
arch/arm/boot/dts/armada-370-db.dts |   15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 9b82fac..fba3e8e 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -59,5 +59,20 @@
 			phy = <&phy1>;
 			phy-mode = "rgmii-id";
 		};
+
+		pcie-controller {
+			status = "okay";
+			/*
+			 * The two PCIe units are accessible through
+			 * both standard PCIe slots and mini-PCIe
+			 * slots on the board.
+			 */
+			pcie@0,0 {
+				status = "okay";
+			};
+			pcie@1,0 {
+				status = "okay";
+			};
+		};
 	};
 };