From patchwork Mon Feb 11 13:35:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Otavio Salvador X-Patchwork-Id: 219601 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 068072C02EA for ; Tue, 12 Feb 2013 00:32:40 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 80FEE4A0EF; Mon, 11 Feb 2013 14:32:29 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XdD8UVpyj-ff; Mon, 11 Feb 2013 14:32:29 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5F6AA4A0F0; Mon, 11 Feb 2013 14:31:52 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8C90A4A0B8 for ; Mon, 11 Feb 2013 14:31:42 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1C0b3J6+xz3H for ; Mon, 11 Feb 2013 14:31:41 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-gh0-f182.google.com (mail-gh0-f182.google.com [209.85.160.182]) by theia.denx.de (Postfix) with ESMTPS id 96F064A048 for ; Mon, 11 Feb 2013 14:31:38 +0100 (CET) Received: by mail-gh0-f182.google.com with SMTP id z15so1229631ghb.27 for ; Mon, 11 Feb 2013 05:31:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=ho+5j9iemucSi21lyGxI0f1Y9x9VUoxolSoIGRe+2s8=; b=BhT54rfa/wsS40CbHxlmIaCeHB5Qoy91jGmQXziKPehJLCnEDxmQqKdjOtziRfUWM6 5jP9syJSFnTzgJlI/Wg4w1SD6Rv39TkMrSiq3AOvgixRDRwAZoSub7TI1DlZY1JRVq2M tj2eifG661hnH6Xj1sjLerJ+sAd414xb+heEkeit+WUCdfRD3bLnhKRJ6KqCj2yBg2cy 0MJcRAmp1062b7EIA9VvbhCxnfMd1woK75e9UB6NDK/9GU83V4pYgz5Ixw5XVJtGVS3O CAoIZrLaGznfUmTCLZZHOj2fmGatK3vbZowtmZrjLaXdSZMMdqKzGIM3/brzgO4sapY6 raQg== X-Received: by 10.236.149.74 with SMTP id w50mr17884206yhj.129.1360589497421; Mon, 11 Feb 2013 05:31:37 -0800 (PST) Received: from nano.lab.ossystems.com.br ([187.23.144.59]) by mx.google.com with ESMTPS id s34sm47008050yhe.9.2013.02.11.05.31.35 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 11 Feb 2013 05:31:36 -0800 (PST) From: Otavio Salvador To: U-Boot Mailing List Date: Mon, 11 Feb 2013 11:35:49 -0200 Message-Id: <1360589756-26355-4-git-send-email-otavio@ossystems.com.br> X-Mailer: git-send-email 1.8.1 In-Reply-To: <1360589756-26355-1-git-send-email-otavio@ossystems.com.br> References: <1360589756-26355-1-git-send-email-otavio@ossystems.com.br> Cc: Fabio Estevam , Marek Vasut , Otavio Salvador Subject: [U-Boot] [PATCH v2 03/10] mx23evk: Adjust DRAM control register to use full 128MB of RAM X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Adjust HW_DRAM_CTL14 to enable the chip selects to allow usage of full 128MB of RAM. Signed-off-by: Otavio Salvador --- Changes in v2: None board/freescale/mx23evk/spl_boot.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/board/freescale/mx23evk/spl_boot.c b/board/freescale/mx23evk/spl_boot.c index 6007433..b6f4e7e 100644 --- a/board/freescale/mx23evk/spl_boot.c +++ b/board/freescale/mx23evk/spl_boot.c @@ -98,6 +98,16 @@ const iomux_cfg_t iomux_setup[] = { (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), }; +#define HW_DRAM_CTL14 (0x38 >> 2) +#define CS_MAP 0x3 +#define INTAREF 0x2 +#define HW_DRAM_CTL14_CONFIG (INTAREF << 8 | CS_MAP) + +void mxs_adjust_memory_params(uint32_t *dram_vals) +{ + dram_vals[HW_DRAM_CTL14] = HW_DRAM_CTL14_CONFIG; +} + void board_init_ll(void) { mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));