[ARM,3/3] Add vectorization support for rounding functions

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 0c824b8..3158e87 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2147,22 +2147,6 @@  proc check_effective_target_arm_v8_vfp_ok {} {
     }
 }
 
-# Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
-# -mfloat-abi=softfp
-proc check_effective_target_arm_v8_neon_ok {} {
-    if { [check_effective_target_arm32] } {
-	return [check_no_compiler_messages arm_v8_neon_ok object {
-	  int foo (void)
-	  {
-	     __asm__ volatile ("vrintn.f32 q0, q0");
-	       return 0;
-	  }
-	} "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"]
-    } else {
-	return 0
-    }
-}
-
 # Return 1 if this is an ARM target supporting -mfpu=vfp
 # -mfloat-abi=hard.  Some multilibs may be incompatible with these
 # options.
@@ -2226,7 +2210,8 @@  proc add_options_for_arm_v8_neon { flags } {
     if { ! [check_effective_target_arm_v8_neon_ok] } {
         return "$flags"
     }
-    return "$flags -march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=softfp"
+    global et_arm_v8_neon_flags
+    return "$flags $et_arm_v8_neon_flags"
 }
 
 # Add the options needed for NEON.  We need either -mfloat-abi=softfp
@@ -2270,6 +2255,38 @@  proc check_effective_target_arm_neon_ok { } {
 		check_effective_target_arm_neon_ok_nocache]
 }
 
+# Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
+# -mfloat-abi=softfp or equivalent options.  Some multilibs may be
+# incompatible with these options.  Also set et_arm_v8_neon_flags to the
+# best options to add.
+
+proc check_effective_target_arm_v8_neon_ok_nocache { } {
+    global et_arm_v8_neon_flags
+    set et_arm_v8_neon_flags ""
+    if { [check_effective_target_arm32] } {
+	foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
+	    if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
+		#include "arm_neon.h"
+		void
+		foo ()
+		{
+	          __asm__ volatile ("vrintn.f32 q0, q0");
+		}
+	    } "$flags"] } {
+		set et_arm_v8_neon_flags $flags
+		return 1
+	    }
+	}
+    }
+
+    return 0
+}
+
+proc check_effective_target_arm_v8_neon_ok { } {
+    return [check_cached_effective_target arm_v8_neon_ok \
+		check_effective_target_arm_v8_neon_ok_nocache]
+}
+
 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
 # -mfloat-abi=softfp or equivalent options.  Some multilibs may be
 # incompatible with these options.  Also set et_arm_neonv2_flags to the
@@ -2509,6 +2526,24 @@  proc check_effective_target_arm_neonv2_hw { } {
     } [add_options_for_arm_neonv2 ""]]
 }
 
+# Return 1 if the target supports executing ARMv8 NEON instructions, 0
+# otherwise.
+
+proc check_effective_target_arm_v8_neon_hw { } {
+    return [check_runtime arm_v8_neon_hw_available {
+        #include "arm_neon.h"
+	int
+	main (void)
+	{
+	  float32x2_t a;
+	  asm ("vrinta.f32 %P0, %P1"
+	       : "=w" (a)
+	       : "0" (a));
+	  return 0;
+	}
+    } [add_options_for_arm_v8_neon ""]]
+}
+
 # Return 1 if this is a ARM target with NEON enabled.
 
 proc check_effective_target_arm_neon { } {
@@ -4035,7 +4070,9 @@  proc check_effective_target_vect_call_btruncf { } {
 	verbose "check_effective_target_vect_call_btruncf: using cached result" 2
     } else {
 	set et_vect_call_btruncf_saved 0
-	if { [istarget aarch64*-*-*] } {
+	if { [istarget aarch64*-*-*]
+	     || ([istarget arm*-*-*]
+	         && [check_effective_target_arm_v8_neon_ok]) } {
 	  set et_vect_call_btruncf_saved 1
 	}
     }
@@ -4071,7 +4108,9 @@  proc check_effective_target_vect_call_ceilf { } {
 	verbose "check_effective_target_vect_call_ceilf: using cached result" 2
     } else {
 	set et_vect_call_ceilf_saved 0
-	if { [istarget aarch64*-*-*] } {
+	if { [istarget aarch64*-*-*]
+	     || ([istarget arm*-*-*]
+	         && [check_effective_target_arm_v8_neon_ok]) } {
 	  set et_vect_call_ceilf_saved 1
 	}
     }
@@ -4107,7 +4146,9 @@  proc check_effective_target_vect_call_floorf { } {
 	verbose "check_effective_target_vect_call_floorf: using cached result" 2
     } else {
 	set et_vect_call_floorf_saved 0
-	if { [istarget aarch64*-*-*] } {
+	if { [istarget aarch64*-*-*]
+	     || ([istarget arm*-*-*]
+	         && [check_effective_target_arm_v8_neon_ok]) } {
 	  set et_vect_call_floorf_saved 1
 	}
     }
@@ -4215,7 +4256,9 @@  proc check_effective_target_vect_call_roundf { } {
 	verbose "check_effective_target_vect_call_roundf: using cached result" 2
     } else {
 	set et_vect_call_roundf_saved 0
-	if { [istarget aarch64*-*-*] } {
+	if { [istarget aarch64*-*-*]
+	     || ([istarget arm*-*-*]
+	         && [check_effective_target_arm_v8_neon_ok]) } {
 	  set et_vect_call_roundf_saved 1
 	}
     }
@@ -5117,6 +5160,14 @@  proc check_vect_support_and_set_flags { } {
         }
     } elseif [istarget ia64-*-*] {
         set dg-do-what-default run
+    } elseif [is-effective-target arm_v8_neon_ok] {
+        eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_v8_neon ""]
+        lappend DEFAULT_VECTCFLAGS "-ffast-math"
+        if [is-effective-target arm_v8_neon_hw] {
+            set dg-do-what-default run
+        } else {
+            set dg-do-what-default compile
+        }
     } elseif [is-effective-target arm_neon_ok] {
         eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
         # NEON does not support denormals, so is not used for vectorization by