From patchwork Thu Feb 7 12:00:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Birje X-Patchwork-Id: 218899 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5C9B12C0292 for ; Thu, 7 Feb 2013 22:55:56 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DA5224A0FF; Thu, 7 Feb 2013 12:55:54 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QN8Sng+Z8HAK; Thu, 7 Feb 2013 12:55:54 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4334B4A0BF; Thu, 7 Feb 2013 12:55:52 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4D7394A0B8 for ; Thu, 7 Feb 2013 12:55:49 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rEzKn4xT3kYg for ; Thu, 7 Feb 2013 12:55:46 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout1.samsung.com (mailout1.samsung.com [203.254.224.24]) by theia.denx.de (Postfix) with ESMTP id 212774A0A9 for ; Thu, 7 Feb 2013 12:55:43 +0100 (CET) Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MHU001F7MGQ4AH0@mailout1.samsung.com> for u-boot@lists.denx.de; Thu, 07 Feb 2013 20:55:42 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.122]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 95.9C.03918.D3693115; Thu, 07 Feb 2013 20:55:42 +0900 (KST) X-AuditID: cbfee61a-b7f7d6d000000f4e-6f-5113963d1240 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 55.9C.03918.D3693115; Thu, 07 Feb 2013 20:55:41 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MHU00EZ7MC09A40@mmp1.samsung.com> for u-boot@lists.denx.de; Thu, 07 Feb 2013 20:55:41 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Date: Thu, 07 Feb 2013 17:30:29 +0530 Message-id: <1360238430-27715-4-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1360238430-27715-1-git-send-email-rajeshwari.s@samsung.com> References: <1360238430-27715-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrELMWRmVeSWpSXmKPExsWyRsSkStdumnCgwd/lTBZv93ayOzB6nL2z gzGAMYrLJiU1J7MstUjfLoEro+nbZZaCozsZK/5NPcnUwLhjFmMXIyeHhICJxKobq5ghbDGJ C/fWs4HYQgJLGSUerK6Hqdm65DVQPRdQfBGjxK7uBewQRauYJLac4wCx2QSMJLaenAY2VERA QuJX/1Uwm1kgRuL1/h9gQ4WBBk1dMheol4ODRUBVYtMbE5Awr4CHRP/NN2wQuxQkjk39ygpS wingKdHwTxdik4dE08VfYCdICFxnkzi+dDVYPYuAgMS3yYdYQOolBGQlNh2AekVS4uCKGywT GIUXMDKsYhRNLUguKE5KzzXUK07MLS7NS9dLzs/dxAgMwdP/nkntYFzZYHGIUYCDUYmH98ZS oUAh1sSy4srcQ4wSHMxKIrwna4QDhXhTEiurUovy44tKc1KLDzEmAy2fyCwlmpwPjI+8knhD YxNzU2NTSyMjM1NT0oSVxHkZTz0JEBJITyxJzU5NLUgtgtnCxMEp1cBY9O306gsfp7yaV9Sj 4CfwVGTGX4sGx7asX88Lt83frtH+aKsRx7Ul8Vc7zkUw5UfmZaruexobqXyP9ciPHO3iA0+U 98dlzqlXORNz3zT+wp9ZconJIp6b3HKUjuyMO3NW4fdC/oPqX/3717I2Fy4+Kryda9Kri72p Uj/2nAxPuGaTqG7HaZiqxFKckWioxVxUnAgA5z9dJ4UCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrEIsWRmVeSWpSXmKPExsVy+t9jAV3bacKBBhf26Vm83dvJ7sDocfbO DsYAxqgGRpuM1MSU1CKF1Lzk/JTMvHRbJe/geOd4UzMDQ11DSwtzJYW8xNxUWyUXnwBdt8wc oLFKCmWJOaVAoYDE4mIlfTtME0JD3HQtYBojdH1DguB6jAzQQMIaxoymb5dZCo7uZKz4N/Uk UwPjjlmMXYycHBICJhJbl7yGssUkLtxbz9bFyMUhJLCIUWJX9wJ2kISQwComiS3nOEBsNgEj ia0np4E1iAhISPzqvwpmMwvESLze/4MNxBYGGjp1yVygXg4OFgFViU1vTEDCvAIeEv0337BB 7FKQODb1KytICaeAp0TDP12ITR4STRd/MU5g5F3AyLCKUTS1ILmgOCk911CvODG3uDQvXS85 P3cTIzjEn0ntYFzZYHGIUYCDUYmH98ZSoUAh1sSy4srcQ4wSHMxKIrwna4QDhXhTEiurUovy 44tKc1KLDzEmA900kVlKNDkfGH95JfGGxibmpsamliYWJmaWpAkrifMynnoSICSQnliSmp2a WpBaBLOFiYNTqoHRc2qYlJ8409ZnIt57Ps79m9x8T7p70ccAXVumqycu/ZG/4ZlgPWHLnUav HvuX1ha6IvsXTHvz+vFpa9EtUnMko2R27pPcurA7eK3DAo5eB6GM1OLKZU4n0uWWzfsiOVX3 dugOy8AXzwxSE7X/vvlf5CyuU3vb9pOryGoZpYteHZ2VU73MLi1TYinOSDTUYi4qTgQAi/Yj 6bUCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Cc: patches@linaro.org Subject: [U-Boot] [PATCH 3/4 V3] S5P: Rename GPIO definitions X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch rename GPIO definitions from GPIO_... to S5P_GPIO_... This changes was done to enable cmd_gpio for EXYNOS and cmd_gpio has GPIO_INPUT same as s5p_gpio driver and hence getting a error during compilation. Build tested for s5p_goni, origen, smdk5250, s5pc210_universal, trats, smdkc100, smdkv310 config files. Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Chnages in V3: - New Patch arch/arm/cpu/armv7/exynos/pinmux.c | 134 +++++++++++++++--------------- arch/arm/include/asm/arch-exynos/gpio.h | 26 +++--- arch/arm/include/asm/arch-s5pc1xx/gpio.h | 26 +++--- board/samsung/goni/goni.c | 4 +- board/samsung/origen/origen.c | 8 +- board/samsung/smdk5250/smdk5250.c | 8 +- board/samsung/smdkc100/smdkc100.c | 2 +- board/samsung/smdkv310/smdkv310.c | 10 +- board/samsung/trats/trats.c | 16 ++-- board/samsung/universal_c210/universal.c | 36 ++++---- drivers/gpio/s5p_gpio.c | 20 ++-- 11 files changed, 145 insertions(+), 145 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index c79d58e..28b0306 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -50,8 +50,8 @@ static void exynos5_uart_config(int peripheral) break; } for (i = start; i < start + count; i++) { - gpio_set_pull(i, GPIO_PULL_NONE); - gpio_cfg_pin(i, GPIO_FUNC(0x2)); + gpio_set_pull(i, S5P_GPIO_PULL_NONE); + gpio_cfg_pin(i, S5P_GPIO_FUNC(0x2)); } } @@ -63,7 +63,7 @@ static int exynos5_mmc_config(int peripheral, int flags) case PERIPH_ID_SDMMC0: start = GPIO_C00; start_ext = GPIO_C10; - gpio_func = GPIO_FUNC(0x2); + gpio_func = S5P_GPIO_FUNC(0x2); break; case PERIPH_ID_SDMMC1: start = GPIO_C20; @@ -72,7 +72,7 @@ static int exynos5_mmc_config(int peripheral, int flags) case PERIPH_ID_SDMMC2: start = GPIO_C30; start_ext = GPIO_C43; - gpio_func = GPIO_FUNC(0x3); + gpio_func = S5P_GPIO_FUNC(0x3); break; case PERIPH_ID_SDMMC3: start = GPIO_C40; @@ -87,19 +87,19 @@ static int exynos5_mmc_config(int peripheral, int flags) if (flags & PINMUX_FLAG_8BIT_MODE) { for (i = start_ext; i <= (start_ext + 3); i++) { gpio_cfg_pin(i, gpio_func); - gpio_set_pull(i, GPIO_PULL_UP); - gpio_set_drv(i, GPIO_DRV_4X); + gpio_set_pull(i, S5P_GPIO_PULL_UP); + gpio_set_drv(i, S5P_GPIO_DRV_4X); } } for (i = 0; i < 2; i++) { - gpio_cfg_pin(start + i, GPIO_FUNC(0x2)); - gpio_set_pull(start + i, GPIO_PULL_NONE); - gpio_set_drv(start + i, GPIO_DRV_4X); + gpio_cfg_pin(start + i, S5P_GPIO_FUNC(0x2)); + gpio_set_pull(start + i, S5P_GPIO_PULL_NONE); + gpio_set_drv(start + i, S5P_GPIO_DRV_4X); } for (i = 3; i <= 6; i++) { - gpio_cfg_pin(start + i, GPIO_FUNC(0x2)); - gpio_set_pull(start + i, GPIO_PULL_UP); - gpio_set_drv(start + i, GPIO_DRV_4X); + gpio_cfg_pin(start + i, S5P_GPIO_FUNC(0x2)); + gpio_set_pull(start + i, S5P_GPIO_PULL_UP); + gpio_set_drv(start + i, S5P_GPIO_DRV_4X); } return 0; @@ -125,12 +125,12 @@ static void exynos5_sromc_config(int flags) * GPY1[3] EBI_DATA_RDn(2) */ gpio_cfg_pin(GPIO_Y00 + (flags & PINMUX_FLAG_BANK), - GPIO_FUNC(2)); - gpio_cfg_pin(GPIO_Y04, GPIO_FUNC(2)); - gpio_cfg_pin(GPIO_Y05, GPIO_FUNC(2)); + S5P_GPIO_FUNC(2)); + gpio_cfg_pin(GPIO_Y04, S5P_GPIO_FUNC(2)); + gpio_cfg_pin(GPIO_Y05, S5P_GPIO_FUNC(2)); for (i = 0; i < 4; i++) - gpio_cfg_pin(GPIO_Y10 + i, GPIO_FUNC(2)); + gpio_cfg_pin(GPIO_Y10 + i, S5P_GPIO_FUNC(2)); /* * EBI: 8 Addrss Lines @@ -165,14 +165,14 @@ static void exynos5_sromc_config(int flags) * GPY6[7] EBI_DATA[15](2) */ for (i = 0; i < 8; i++) { - gpio_cfg_pin(GPIO_Y30 + i, GPIO_FUNC(2)); - gpio_set_pull(GPIO_Y30 + i, GPIO_PULL_UP); + gpio_cfg_pin(GPIO_Y30 + i, S5P_GPIO_FUNC(2)); + gpio_set_pull(GPIO_Y30 + i, S5P_GPIO_PULL_UP); - gpio_cfg_pin(GPIO_Y50 + i, GPIO_FUNC(2)); - gpio_set_pull(GPIO_Y50 + i, GPIO_PULL_UP); + gpio_cfg_pin(GPIO_Y50 + i, S5P_GPIO_FUNC(2)); + gpio_set_pull(GPIO_Y50 + i, S5P_GPIO_PULL_UP); - gpio_cfg_pin(GPIO_Y60 + i, GPIO_FUNC(2)); - gpio_set_pull(GPIO_Y60 + i, GPIO_PULL_UP); + gpio_cfg_pin(GPIO_Y60 + i, S5P_GPIO_FUNC(2)); + gpio_set_pull(GPIO_Y60 + i, S5P_GPIO_PULL_UP); } } @@ -181,36 +181,36 @@ static void exynos5_i2c_config(int peripheral, int flags) switch (peripheral) { case PERIPH_ID_I2C0: - gpio_cfg_pin(GPIO_B30, GPIO_FUNC(0x2)); - gpio_cfg_pin(GPIO_B31, GPIO_FUNC(0x2)); + gpio_cfg_pin(GPIO_B30, S5P_GPIO_FUNC(0x2)); + gpio_cfg_pin(GPIO_B31, S5P_GPIO_FUNC(0x2)); break; case PERIPH_ID_I2C1: - gpio_cfg_pin(GPIO_B32, GPIO_FUNC(0x2)); - gpio_cfg_pin(GPIO_B33, GPIO_FUNC(0x2)); + gpio_cfg_pin(GPIO_B32, S5P_GPIO_FUNC(0x2)); + gpio_cfg_pin(GPIO_B33, S5P_GPIO_FUNC(0x2)); break; case PERIPH_ID_I2C2: - gpio_cfg_pin(GPIO_A06, GPIO_FUNC(0x3)); - gpio_cfg_pin(GPIO_A07, GPIO_FUNC(0x3)); + gpio_cfg_pin(GPIO_A06, S5P_GPIO_FUNC(0x3)); + gpio_cfg_pin(GPIO_A07, S5P_GPIO_FUNC(0x3)); break; case PERIPH_ID_I2C3: - gpio_cfg_pin(GPIO_A12, GPIO_FUNC(0x3)); - gpio_cfg_pin(GPIO_A13, GPIO_FUNC(0x3)); + gpio_cfg_pin(GPIO_A12, S5P_GPIO_FUNC(0x3)); + gpio_cfg_pin(GPIO_A13, S5P_GPIO_FUNC(0x3)); break; case PERIPH_ID_I2C4: - gpio_cfg_pin(GPIO_A20, GPIO_FUNC(0x3)); - gpio_cfg_pin(GPIO_A21, GPIO_FUNC(0x3)); + gpio_cfg_pin(GPIO_A20, S5P_GPIO_FUNC(0x3)); + gpio_cfg_pin(GPIO_A21, S5P_GPIO_FUNC(0x3)); break; case PERIPH_ID_I2C5: - gpio_cfg_pin(GPIO_A22, GPIO_FUNC(0x3)); - gpio_cfg_pin(GPIO_A23, GPIO_FUNC(0x3)); + gpio_cfg_pin(GPIO_A22, S5P_GPIO_FUNC(0x3)); + gpio_cfg_pin(GPIO_A23, S5P_GPIO_FUNC(0x3)); break; case PERIPH_ID_I2C6: - gpio_cfg_pin(GPIO_B13, GPIO_FUNC(0x4)); - gpio_cfg_pin(GPIO_B14, GPIO_FUNC(0x4)); + gpio_cfg_pin(GPIO_B13, S5P_GPIO_FUNC(0x4)); + gpio_cfg_pin(GPIO_B14, S5P_GPIO_FUNC(0x4)); break; case PERIPH_ID_I2C7: - gpio_cfg_pin(GPIO_B22, GPIO_FUNC(0x3)); - gpio_cfg_pin(GPIO_B23, GPIO_FUNC(0x3)); + gpio_cfg_pin(GPIO_B22, S5P_GPIO_FUNC(0x3)); + gpio_cfg_pin(GPIO_B23, S5P_GPIO_FUNC(0x3)); break; } } @@ -220,7 +220,7 @@ static void exynos5_i2s_config(int peripheral) int i; for (i = 0; i < 5; i++) - gpio_cfg_pin(GPIO_B00+i, GPIO_FUNC(0x02)); + gpio_cfg_pin(GPIO_B00+i, S5P_GPIO_FUNC(0x02)); } void exynos5_spi_config(int peripheral) @@ -229,25 +229,25 @@ void exynos5_spi_config(int peripheral) switch (peripheral) { case PERIPH_ID_SPI0: - cfg = GPIO_FUNC(0x2); + cfg = S5P_GPIO_FUNC(0x2); pin = GPIO_A20; break; case PERIPH_ID_SPI1: - cfg = GPIO_FUNC(0x2); + cfg = S5P_GPIO_FUNC(0x2); pin = GPIO_A24; break; case PERIPH_ID_SPI2: - cfg = GPIO_FUNC(0x5); + cfg = S5P_GPIO_FUNC(0x5); pin = GPIO_B11; break; case PERIPH_ID_SPI3: - cfg = GPIO_FUNC(0x2); + cfg = S5P_GPIO_FUNC(0x2); pin = GPIO_F10; break; case PERIPH_ID_SPI4: for (i = 0; i < 2; i++) { - gpio_cfg_pin(GPIO_F02 + i, GPIO_FUNC(0x4)); - gpio_cfg_pin(GPIO_E04 + i, GPIO_FUNC(0x4)); + gpio_cfg_pin(GPIO_F02 + i, S5P_GPIO_FUNC(0x4)); + gpio_cfg_pin(GPIO_E04 + i, S5P_GPIO_FUNC(0x4)); } break; } @@ -309,36 +309,36 @@ static void exynos4_i2c_config(int peripheral, int flags) switch (peripheral) { case PERIPH_ID_I2C0: - s5p_gpio_cfg_pin(&gpio1->d1, 0, GPIO_FUNC(0x2)); - s5p_gpio_cfg_pin(&gpio1->d1, 1, GPIO_FUNC(0x2)); + s5p_gpio_cfg_pin(&gpio1->d1, 0, S5P_GPIO_FUNC(0x2)); + s5p_gpio_cfg_pin(&gpio1->d1, 1, S5P_GPIO_FUNC(0x2)); break; case PERIPH_ID_I2C1: - s5p_gpio_cfg_pin(&gpio1->d1, 2, GPIO_FUNC(0x2)); - s5p_gpio_cfg_pin(&gpio1->d1, 3, GPIO_FUNC(0x2)); + s5p_gpio_cfg_pin(&gpio1->d1, 2, S5P_GPIO_FUNC(0x2)); + s5p_gpio_cfg_pin(&gpio1->d1, 3, S5P_GPIO_FUNC(0x2)); break; case PERIPH_ID_I2C2: - s5p_gpio_cfg_pin(&gpio1->a0, 6, GPIO_FUNC(0x3)); - s5p_gpio_cfg_pin(&gpio1->a0, 7, GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(&gpio1->a0, 6, S5P_GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(&gpio1->a0, 7, S5P_GPIO_FUNC(0x3)); break; case PERIPH_ID_I2C3: - s5p_gpio_cfg_pin(&gpio1->a1, 2, GPIO_FUNC(0x3)); - s5p_gpio_cfg_pin(&gpio1->a1, 3, GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(&gpio1->a1, 2, S5P_GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(&gpio1->a1, 3, S5P_GPIO_FUNC(0x3)); break; case PERIPH_ID_I2C4: - s5p_gpio_cfg_pin(&gpio1->b, 2, GPIO_FUNC(0x3)); - s5p_gpio_cfg_pin(&gpio1->b, 3, GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(&gpio1->b, 2, S5P_GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(&gpio1->b, 3, S5P_GPIO_FUNC(0x3)); break; case PERIPH_ID_I2C5: - s5p_gpio_cfg_pin(&gpio1->b, 6, GPIO_FUNC(0x3)); - s5p_gpio_cfg_pin(&gpio1->b, 7, GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(&gpio1->b, 6, S5P_GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(&gpio1->b, 7, S5P_GPIO_FUNC(0x3)); break; case PERIPH_ID_I2C6: - s5p_gpio_cfg_pin(&gpio1->c1, 3, GPIO_FUNC(0x4)); - s5p_gpio_cfg_pin(&gpio1->c1, 4, GPIO_FUNC(0x4)); + s5p_gpio_cfg_pin(&gpio1->c1, 3, S5P_GPIO_FUNC(0x4)); + s5p_gpio_cfg_pin(&gpio1->c1, 4, S5P_GPIO_FUNC(0x4)); break; case PERIPH_ID_I2C7: - s5p_gpio_cfg_pin(&gpio1->d0, 2, GPIO_FUNC(0x3)); - s5p_gpio_cfg_pin(&gpio1->d0, 3, GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(&gpio1->d0, 2, S5P_GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(&gpio1->d0, 3, S5P_GPIO_FUNC(0x3)); break; } } @@ -365,15 +365,15 @@ static int exynos4_mmc_config(int peripheral, int flags) for (i = 0; i < 7; i++) { if (i == 2) continue; - s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); - s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE); - s5p_gpio_set_drv(bank, i, GPIO_DRV_4X); + s5p_gpio_cfg_pin(bank, i, S5P_GPIO_FUNC(0x2)); + s5p_gpio_set_pull(bank, i, S5P_GPIO_PULL_NONE); + s5p_gpio_set_drv(bank, i, S5P_GPIO_DRV_4X); } if (flags & PINMUX_FLAG_8BIT_MODE) { for (i = 3; i < 7; i++) { - s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3)); - s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE); - s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X); + s5p_gpio_cfg_pin(bank_ext, i, S5P_GPIO_FUNC(0x3)); + s5p_gpio_set_pull(bank_ext, i, S5P_GPIO_PULL_NONE); + s5p_gpio_set_drv(bank_ext, i, S5P_GPIO_DRV_4X); } } diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h index af882dd..38b959d 100644 --- a/arch/arm/include/asm/arch-exynos/gpio.h +++ b/arch/arm/include/asm/arch-exynos/gpio.h @@ -660,21 +660,21 @@ void gpio_set_drv(int gpio, int mode); #endif /* Pin configurations */ -#define GPIO_INPUT 0x0 -#define GPIO_OUTPUT 0x1 -#define GPIO_IRQ 0xf -#define GPIO_FUNC(x) (x) +#define S5P_GPIO_INPUT 0x0 +#define S5P_GPIO_OUTPUT 0x1 +#define S5P_GPIO_IRQ 0xf +#define S5P_GPIO_FUNC(x) (x) /* Pull mode */ -#define GPIO_PULL_NONE 0x0 -#define GPIO_PULL_DOWN 0x1 -#define GPIO_PULL_UP 0x3 +#define S5P_GPIO_PULL_NONE 0x0 +#define S5P_GPIO_PULL_DOWN 0x1 +#define S5P_GPIO_PULL_UP 0x3 /* Drive Strength level */ -#define GPIO_DRV_1X 0x0 -#define GPIO_DRV_3X 0x1 -#define GPIO_DRV_2X 0x2 -#define GPIO_DRV_4X 0x3 -#define GPIO_DRV_FAST 0x0 -#define GPIO_DRV_SLOW 0x1 +#define S5P_GPIO_DRV_1X 0x0 +#define S5P_GPIO_DRV_3X 0x1 +#define S5P_GPIO_DRV_2X 0x2 +#define S5P_GPIO_DRV_4X 0x3 +#define S5P_GPIO_DRV_FAST 0x0 +#define S5P_GPIO_DRV_SLOW 0x1 #endif diff --git a/arch/arm/include/asm/arch-s5pc1xx/gpio.h b/arch/arm/include/asm/arch-s5pc1xx/gpio.h index 00e498d..e0605a2 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/gpio.h +++ b/arch/arm/include/asm/arch-s5pc1xx/gpio.h @@ -155,22 +155,22 @@ static inline unsigned int s5p_gpio_part_max(int nr) #endif /* Pin configurations */ -#define GPIO_INPUT 0x0 -#define GPIO_OUTPUT 0x1 -#define GPIO_IRQ 0xf -#define GPIO_FUNC(x) (x) +#define S5P_GPIO_INPUT 0x0 +#define S5P_GPIO_OUTPUT 0x1 +#define S5P_GPIO_IRQ 0xf +#define S5P_GPIO_FUNC(x) (x) /* Pull mode */ -#define GPIO_PULL_NONE 0x0 -#define GPIO_PULL_DOWN 0x1 -#define GPIO_PULL_UP 0x2 +#define S5P_GPIO_PULL_NONE 0x0 +#define S5P_GPIO_PULL_DOWN 0x1 +#define S5P_GPIO_PULL_UP 0x2 /* Drive Strength level */ -#define GPIO_DRV_1X 0x0 -#define GPIO_DRV_3X 0x1 -#define GPIO_DRV_2X 0x2 -#define GPIO_DRV_4X 0x3 -#define GPIO_DRV_FAST 0x0 -#define GPIO_DRV_SLOW 0x1 +#define S5P_GPIO_DRV_1X 0x0 +#define S5P_GPIO_DRV_3X 0x1 +#define S5P_GPIO_DRV_2X 0x2 +#define S5P_GPIO_DRV_4X 0x3 +#define S5P_GPIO_DRV_FAST 0x0 +#define S5P_GPIO_DRV_SLOW 0x1 #endif diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index ff76963..daa0faa 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -102,9 +102,9 @@ int board_mmc_init(bd_t *bis) /* GPG0[0:6] special function 2 */ s5p_gpio_cfg_pin(&s5pc110_gpio->g0, i, 0x2); /* GPG0[0:6] pull disable */ - s5p_gpio_set_pull(&s5pc110_gpio->g0, i, GPIO_PULL_NONE); + s5p_gpio_set_pull(&s5pc110_gpio->g0, i, S5P_GPIO_PULL_NONE); /* GPG0[0:6] drv 4x */ - s5p_gpio_set_drv(&s5pc110_gpio->g0, i, GPIO_DRV_4X); + s5p_gpio_set_drv(&s5pc110_gpio->g0, i, S5P_GPIO_DRV_4X); } return s5p_mmc_init(0, 4); diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c index 638e7b1..1c82ac6 100644 --- a/board/samsung/origen/origen.c +++ b/board/samsung/origen/origen.c @@ -88,19 +88,19 @@ int board_mmc_init(bd_t *bis) */ for (i = 0; i < 7; i++) { /* GPK2[0:6] special function 2 */ - s5p_gpio_cfg_pin(&gpio2->k2, i, GPIO_FUNC(0x2)); + s5p_gpio_cfg_pin(&gpio2->k2, i, S5P_GPIO_FUNC(0x2)); /* GPK2[0:6] drv 4x */ - s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X); + s5p_gpio_set_drv(&gpio2->k2, i, S5P_GPIO_DRV_4X); /* GPK2[0:1] pull disable */ if (i == 0 || i == 1) { - s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE); + s5p_gpio_set_pull(&gpio2->k2, i, S5P_GPIO_PULL_NONE); continue; } /* GPK2[2:6] pull up */ - s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_UP); + s5p_gpio_set_pull(&gpio2->k2, i, S5P_GPIO_PULL_UP); } err = s5p_mmc_init(2, 4); diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 6f2e067..61cac1c 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -64,7 +64,7 @@ static void board_enable_audio_codec(void) /* Enable MAX98095 Codec */ s5p_gpio_direction_output(&gpio1->x1, 7, 1); - s5p_gpio_set_pull(&gpio1->x1, 7, GPIO_PULL_NONE); + s5p_gpio_set_pull(&gpio1->x1, 7, S5P_GPIO_PULL_NONE); } #endif @@ -412,15 +412,15 @@ void cfg_lcd_gpio(void) (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); /* For Backlight */ - s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT); + s5p_gpio_cfg_pin(&gpio1->b2, 0, S5P_GPIO_OUTPUT); s5p_gpio_set_value(&gpio1->b2, 0, 1); /* LCD power on */ - s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT); + s5p_gpio_cfg_pin(&gpio1->x1, 5, S5P_GPIO_OUTPUT); s5p_gpio_set_value(&gpio1->x1, 5, 1); /* Set Hotplug detect for DP */ - s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(&gpio1->x0, 7, S5P_GPIO_FUNC(0x3)); } vidinfo_t panel_info = { diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c index c41e610..87a8f5a 100644 --- a/board/samsung/smdkc100/smdkc100.c +++ b/board/samsung/smdkc100/smdkc100.c @@ -41,7 +41,7 @@ static void smc9115_pre_init(void) (struct s5pc100_gpio *)samsung_get_base_gpio(); /* gpio configuration GPK0CON */ - s5p_gpio_cfg_pin(&gpio->k0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2)); + s5p_gpio_cfg_pin(&gpio->k0, CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2)); /* Ethernet needs bus width of 16 bits */ smc_bw_conf = SMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK); diff --git a/board/samsung/smdkv310/smdkv310.c b/board/samsung/smdkv310/smdkv310.c index 81ac8f6..24e8f18 100644 --- a/board/samsung/smdkv310/smdkv310.c +++ b/board/samsung/smdkv310/smdkv310.c @@ -37,7 +37,7 @@ static void smc9115_pre_init(void) u32 smc_bw_conf, smc_bc_conf; /* gpio configuration GPK0CON */ - s5p_gpio_cfg_pin(&gpio2->y0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2)); + s5p_gpio_cfg_pin(&gpio2->y0, CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2)); /* Ethernet needs bus width of 16 bits */ smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK); @@ -119,19 +119,19 @@ int board_mmc_init(bd_t *bis) */ for (i = 0; i < 7; i++) { /* GPK2[0:6] special function 2 */ - s5p_gpio_cfg_pin(&gpio2->k2, i, GPIO_FUNC(0x2)); + s5p_gpio_cfg_pin(&gpio2->k2, i, S5P_GPIO_FUNC(0x2)); /* GPK2[0:6] drv 4x */ - s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X); + s5p_gpio_set_drv(&gpio2->k2, i, S5P_GPIO_DRV_4X); /* GPK2[0:1] pull disable */ if (i == 0 || i == 1) { - s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE); + s5p_gpio_set_pull(&gpio2->k2, i, S5P_GPIO_PULL_NONE); continue; } /* GPK2[2:6] pull up */ - s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_UP); + s5p_gpio_set_pull(&gpio2->k2, i, S5P_GPIO_PULL_UP); } err = s5p_mmc_init(2, 4); return err; diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 88d193d..13f4930 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -390,8 +390,8 @@ static unsigned int get_hw_revision(void) /* hw_rev[3:0] == GPE1[3:0] */ for (i = 0; i < 4; i++) { - s5p_gpio_cfg_pin(&gpio->e1, i, GPIO_INPUT); - s5p_gpio_set_pull(&gpio->e1, i, GPIO_PULL_NONE); + s5p_gpio_cfg_pin(&gpio->e1, i, S5P_GPIO_INPUT); + s5p_gpio_set_pull(&gpio->e1, i, S5P_GPIO_PULL_NONE); } udelay(1); @@ -430,7 +430,7 @@ int board_mmc_init(bd_t *bis) /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */ s5p_gpio_direction_output(&gpio->k0, 2, 1); - s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE); + s5p_gpio_set_pull(&gpio->k0, 2, S5P_GPIO_PULL_NONE); /* * MMC device init @@ -445,7 +445,7 @@ int board_mmc_init(bd_t *bis) /* T-flash detect */ s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf); - s5p_gpio_set_pull(&gpio->x3, 4, GPIO_PULL_UP); + s5p_gpio_set_pull(&gpio->x3, 4, S5P_GPIO_PULL_UP); /* * Check the T-flash detect pin @@ -522,7 +522,7 @@ static void pmic_reset(void) (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); s5p_gpio_direction_output(&gpio->x0, 7, 1); - s5p_gpio_set_pull(&gpio->x2, 7, GPIO_PULL_NONE); + s5p_gpio_set_pull(&gpio->x2, 7, S5P_GPIO_PULL_NONE); } static void board_clock_init(void) @@ -614,12 +614,12 @@ static void board_uart_init(void) */ for (i = 0; i < 4; i++) { - s5p_gpio_set_pull(&gpio1->a1, i, GPIO_PULL_NONE); - s5p_gpio_cfg_pin(&gpio1->a1, i, GPIO_FUNC((i > 1) ? 0x3 : 0x2)); + s5p_gpio_set_pull(&gpio1->a1, i, S5P_GPIO_PULL_NONE); + s5p_gpio_cfg_pin(&gpio1->a1, i, S5P_GPIO_FUNC((i > 1) ? 0x3 : 0x2)); } /* UART_SEL GPY4[7] (part2) at EXYNOS4 */ - s5p_gpio_set_pull(&gpio2->y4, 7, GPIO_PULL_UP); + s5p_gpio_set_pull(&gpio2->y4, 7, S5P_GPIO_PULL_UP); s5p_gpio_direction_output(&gpio2->y4, 7, 1); } diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index e742707..6ade3f2 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -216,7 +216,7 @@ int board_mmc_init(bd_t *bis) /* T-flash detect */ s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf); - s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP); + s5p_gpio_set_pull(&gpio2->x3, 4, S5P_GPIO_PULL_UP); /* * Check the T-flash detect pin @@ -390,35 +390,35 @@ static void lcd_cfg_gpio(void) for (i = 0; i < 8; i++) { /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */ - s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2)); - s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2)); - s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2)); + s5p_gpio_cfg_pin(&gpio1->f0, i, S5P_GPIO_FUNC(2)); + s5p_gpio_cfg_pin(&gpio1->f1, i, S5P_GPIO_FUNC(2)); + s5p_gpio_cfg_pin(&gpio1->f2, i, S5P_GPIO_FUNC(2)); /* pull-up/down disable */ - s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE); - s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE); - s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE); + s5p_gpio_set_pull(&gpio1->f0, i, S5P_GPIO_PULL_NONE); + s5p_gpio_set_pull(&gpio1->f1, i, S5P_GPIO_PULL_NONE); + s5p_gpio_set_pull(&gpio1->f2, i, S5P_GPIO_PULL_NONE); /* drive strength to max (24bit) */ - s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X); - s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW); - s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X); - s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW); - s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X); - s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW); + s5p_gpio_set_drv(&gpio1->f0, i, S5P_GPIO_DRV_4X); + s5p_gpio_set_rate(&gpio1->f0, i, S5P_GPIO_DRV_SLOW); + s5p_gpio_set_drv(&gpio1->f1, i, S5P_GPIO_DRV_4X); + s5p_gpio_set_rate(&gpio1->f1, i, S5P_GPIO_DRV_SLOW); + s5p_gpio_set_drv(&gpio1->f2, i, S5P_GPIO_DRV_4X); + s5p_gpio_set_rate(&gpio1->f0, i, S5P_GPIO_DRV_SLOW); } for (i = 0; i < f3_end; i++) { /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */ - s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2)); + s5p_gpio_cfg_pin(&gpio1->f3, i, S5P_GPIO_FUNC(2)); /* pull-up/down disable */ - s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE); + s5p_gpio_set_pull(&gpio1->f3, i, S5P_GPIO_PULL_NONE); /* drive strength to max (24bit) */ - s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X); - s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW); + + s5p_gpio_set_rate(&gpio1->f3, i, S5P_GPIO_DRV_SLOW); } /* gpio pad configuration for LCD reset. */ - s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT); + s5p_gpio_cfg_pin(&gpio2->y4, 5, S5P_GPIO_OUTPUT); spi_init(); } diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c index a53bdca..1c8c774 100644 --- a/drivers/gpio/s5p_gpio.c +++ b/drivers/gpio/s5p_gpio.c @@ -50,7 +50,7 @@ void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en) { unsigned int value; - s5p_gpio_cfg_pin(bank, gpio, GPIO_OUTPUT); + s5p_gpio_cfg_pin(bank, gpio, S5P_GPIO_OUTPUT); value = readl(&bank->dat); value &= ~DAT_MASK(gpio); @@ -61,7 +61,7 @@ void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en) void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio) { - s5p_gpio_cfg_pin(bank, gpio, GPIO_INPUT); + s5p_gpio_cfg_pin(bank, gpio, S5P_GPIO_INPUT); } void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en) @@ -91,8 +91,8 @@ void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode) value &= ~PULL_MASK(gpio); switch (mode) { - case GPIO_PULL_DOWN: - case GPIO_PULL_UP: + case S5P_GPIO_PULL_DOWN: + case S5P_GPIO_PULL_UP: value |= PULL_MODE(gpio, mode); break; default: @@ -110,10 +110,10 @@ void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode) value &= ~DRV_MASK(gpio); switch (mode) { - case GPIO_DRV_1X: - case GPIO_DRV_2X: - case GPIO_DRV_3X: - case GPIO_DRV_4X: + case S5P_GPIO_DRV_1X: + case S5P_GPIO_DRV_2X: + case S5P_GPIO_DRV_3X: + case S5P_GPIO_DRV_4X: value |= DRV_SET(gpio, mode); break; default: @@ -131,8 +131,8 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode) value &= ~RATE_MASK(gpio); switch (mode) { - case GPIO_DRV_FAST: - case GPIO_DRV_SLOW: + case S5P_GPIO_DRV_FAST: + case S5P_GPIO_DRV_SLOW: value |= RATE_SET(gpio); break; default: