From patchwork Mon Feb 4 10:41:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 217864 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 74D2A2C029D for ; Mon, 4 Feb 2013 21:56:21 +1100 (EST) Received: from localhost ([::1]:60652 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U2Jil-0004HQ-Le for incoming@patchwork.ozlabs.org; Mon, 04 Feb 2013 05:56:19 -0500 Received: from eggs.gnu.org ([208.118.235.92]:54538) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U2Jid-0004HH-Q5 for qemu-devel@nongnu.org; Mon, 04 Feb 2013 05:56:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U2Jic-0005Ch-LL for qemu-devel@nongnu.org; Mon, 04 Feb 2013 05:56:11 -0500 Received: from isrv.corpit.ru ([86.62.121.231]:32769) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U2Jic-0005Cb-Dc; Mon, 04 Feb 2013 05:56:10 -0500 Received: from gandalf.tls.msk.ru (mjt.vpn.tls.msk.ru [192.168.177.99]) by isrv.corpit.ru (Postfix) with ESMTP id B12C9A03F2; Mon, 4 Feb 2013 14:56:09 +0400 (MSK) Received: by gandalf.tls.msk.ru (Postfix, from userid 1000) id D332A54F; Mon, 4 Feb 2013 14:41:29 +0400 (MSK) From: Michael Tokarev To: qemu-devel@nongnu.org Date: Mon, 4 Feb 2013 14:41:09 +0400 Message-Id: <1359974470-17044-60-git-send-email-mjt@msgid.tls.msk.ru> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359974470-17044-1-git-send-email-mjt@msgid.tls.msk.ru> References: <1359974470-17044-1-git-send-email-mjt@msgid.tls.msk.ru> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 86.62.121.231 Cc: Blue Swirl , Max Filippov , Michael Tokarev , qemu-stable@nongnu.org Subject: [Qemu-devel] [PATCH 59/60] target-xtensa: fix ITLB/DTLB page protection flags X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Max Filippov With MMU option xtensa architecture has two TLBs: ITLB and DTLB. ITLB is only used for code access, DTLB is only for data. However TLB entries in both TLBs have attribute field controlling write and exec access. These bits need to be properly masked off depending on TLB type before being used as tlb_set_page prot argument. Otherwise the following happens: (1) ITLB entry for some PFN gets invalidated (2) DTLB entry for the same PFN gets updated, attributes allow code execution (3) code at the page with that PFN is executed (possible due to step 2), entry for the TB is written into the jump cache (4) QEMU TLB entry for the PFN gets replaced with an entry for some other PFN (5) code in the TB from step 3 is executed (possible due to jump cache) and it accesses data, for which there's no DTLB entry, causing DTLB miss exception (6) re-translation of the TB from step 5 is attempted, but there's no QEMU TLB entry nor xtensa ITLB entry for that PFN, which causes ITLB miss exception at the TB start address (7) ITLB miss exception is handled by the guest, but execution is resumed from the beginning of the faulting TB (the point where ITLB miss occured), not from the point where DTLB miss occured, which is wrong. With that fix the above scenario causes ITLB miss exception (that used to be step 7) at step 3, right at the beginning of the TB. Signed-off-by: Max Filippov Cc: qemu-stable@nongnu.org Signed-off-by: Blue Swirl (cherry picked from commit 659f807c0a700317a7a0fae7a6e6ebfe68bfbbc4) Signed-off-by: Michael Tokarev --- target-xtensa/helper.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index 8ebef72..c9d6f38 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -497,7 +497,8 @@ static int get_physical_addr_mmu(CPUXtensaState *env, bool update_tlb, INST_FETCH_PRIVILEGE_CAUSE; } - *access = mmu_attr_to_access(entry->attr); + *access = mmu_attr_to_access(entry->attr) & + ~(dtlb ? PAGE_EXEC : PAGE_READ | PAGE_WRITE); if (!is_access_granted(*access, is_write)) { return dtlb ? (is_write ?