Patchwork [MIPS,committed] Include mips-sde-elf in vect_float

login
register
mail settings
Submitter Richard Sandiford
Date Feb. 2, 2013, 9:32 a.m.
Message ID <87obg3qcvp.fsf@talisman.default>
Download mbox | patch
Permalink /patch/217645/
State New
Headers show

Comments

Richard Sandiford - Feb. 2, 2013, 9:32 a.m.
I noticed while looking at some -mgp32 -mfp64 vect testsuite failures
on mips-sde-elf that we weren't running the more interesting tests.
Like mipsisa64-elf, hard-float mips-sde-elf ought to have full support
for paired single, and mips-sde-elf is the easiest way of testing
mismatched register sizes.

Tested on mips-sde-elf and applied.

Richard


gcc/testsuite/
	* lib/target-supports.exp (check_effective_target_vect_float)
	(check_effective_target_vect_no_align): Add mips-sde-elf.

Patch

Index: gcc/testsuite/lib/target-supports.exp
===================================================================
--- gcc/testsuite/lib/target-supports.exp	2013-01-23 11:56:58.000000000 +0000
+++ gcc/testsuite/lib/target-supports.exp	2013-02-02 09:25:12.124671796 +0000
@@ -2935,6 +2935,7 @@  proc check_effective_target_vect_float {
 	if { [istarget i?86-*-*]
 	      || [istarget powerpc*-*-*]
 	      || [istarget spu-*-*]
+	      || [istarget mips-sde-elf]
 	      || [istarget mipsisa64*-*-*]
 	      || [istarget x86_64-*-*]
 	      || [istarget ia64-*-*]
@@ -3532,6 +3533,7 @@  proc check_effective_target_vect_no_alig
     } else {
 	set et_vect_no_align_saved 0
 	if { [istarget mipsisa64*-*-*]
+	     || [istarget mips-sde-elf]
 	     || [istarget sparc*-*-*]
 	     || [istarget ia64-*-*]
 	     || [check_effective_target_arm_vect_no_misalign]