Patchwork [U-Boot,RFC] ppc: make the PPC405 jump to _start during RAM/XMD boot

login
register
mail settings
Submitter Mela Custodio
Date Feb. 1, 2013, 11:21 p.m.
Message ID <20130201232141.GA83883@crg>
Download mbox | patch
Permalink /patch/217620/
State RFC
Headers show

Comments

Mela Custodio - Feb. 1, 2013, 11:21 p.m.
Dear All,

This is an RFC.

The first instruction during RAM boot is a branch to _start.
This is as desribed in the start.S file for ppc4xx arch. This
is not the case when trying to do a RAM boot build for the ppc405
platform.


** Pre-patch
build-x405g-pre/u-boot:     file format elf32-powerpc
Disassembly of section .text:   
04000000 <version_string-0x4>:  
 4000000:       27 05 19 56     dozi    r24,r5,6486

** Post-patch
build-x405g-post/u-boot:     file format elf32-powerpc
Disassembly of section .text:
04000000 <version_string-0x8>:
 4000000:       48 00 21 01     bl      4002100 <_start>
 4000004:       27 05 19 56     dozi    r24,r5,6486


Comments are very much welcome.

All the best,
Rommel


During RAM boot first instruction at offset 0 of load the load
address should be a branch to _start.

Signed-off-by: Rommel G Custodio <sessyargc@gmail.com>
---
 arch/powerpc/cpu/ppc4xx/start.S | 5 +++++
 boards.cfg                      | 2 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

Patch

diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index 7aef43b..a2aa02a 100644
--- a/arch/powerpc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
@@ -267,8 +267,13 @@ 
 	 * 4xx RAM-booting U-Boot image is started from offset 0
 	 */
 	.text
+#if defined(CONFIG_440)
 	bl	_start_440
 #endif
+#if defined(CONFIG_405)
+	bl	_start
+#endif
+#endif
 
 /*
  * 440 Startup -- on reset only the top 4k of the effective
diff --git a/boards.cfg b/boards.cfg
index 98f7a14..29b73d9 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -1086,7 +1086,7 @@  METROBOX                     powerpc     ppc4xx      metrobox            sandbur
 xpedite1000                  powerpc     ppc4xx      -                   xes
 ml507                        powerpc     ppc4xx      ml507               xilinx         -           ml507:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o
 ml507_flash                  powerpc     ppc4xx      ml507               xilinx         -           ml507:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o
-xilinx-ppc405-generic        powerpc     ppc4xx      ppc405-generic      xilinx         -           xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000
+xilinx-ppc405-generic        powerpc     ppc4xx      ppc405-generic      xilinx         -           xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1
 xilinx-ppc405-generic_flash  powerpc     ppc4xx      ppc405-generic      xilinx         -           xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC
 xilinx-ppc440-generic        powerpc     ppc4xx      ppc440-generic      xilinx         -           xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1
 xilinx-ppc440-generic_flash  powerpc     ppc4xx      ppc440-generic      xilinx         -           xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC