Patchwork [U-Boot,v2] MIPS: start.S: unify and simplify reset vector handling

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Submitter Daniel Schwierzeck
Date Feb. 1, 2013, 8:55 p.m.
Message ID <1359752134-9547-1-git-send-email-daniel.schwierzeck@gmail.com>
Download mbox | patch
Permalink /patch/217584/
State Accepted
Delegated to: Daniel Schwierzeck
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Comments

Daniel Schwierzeck - Feb. 1, 2013, 8:55 p.m.
From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Adopt reset vector handling from Yamon.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
---
Changes for v2:
- optimized U-Boot entry point on MIPS32
- fix indentation of .org

---
 arch/mips/cpu/mips32/start.S | 186 +++++++++----------------------------------
 arch/mips/cpu/mips64/start.S |  47 +++++------
 2 files changed, 57 insertions(+), 176 deletions(-)
Gabor Juhos - Feb. 1, 2013, 10:17 p.m.
Hi Daniel,

> From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
> 
> Adopt reset vector handling from Yamon.
> 
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Looks good, I have only one minor comment below.

> ---
> Changes for v2:
> - optimized U-Boot entry point on MIPS32
> - fix indentation of .org
> 
> ---
>  arch/mips/cpu/mips32/start.S | 186 +++++++++----------------------------------
>  arch/mips/cpu/mips64/start.S |  47 +++++------
>  2 files changed, 57 insertions(+), 176 deletions(-)
> 
> diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
> index 65acf7d..7373d4e 100644
> --- a/arch/mips/cpu/mips32/start.S
> +++ b/arch/mips/cpu/mips32/start.S
> @@ -47,19 +47,16 @@
>  	.set	pop
>  	.endm
>  
> -#define RVECENT(f,n) \
> -   b f; nop
> -#define XVECENT(f,bev) \
> -   b f     ;           \
> -   li k0,bev
> -
>  	.set noreorder
>  
>  	.globl _start
>  	.text
>  _start:
> -	RVECENT(reset,0)			# U-boot entry point
> -	RVECENT(reset,1)			# software reboot
> +	/* U-boot entry point */
> +	b	reset
> +	 nop
> +
> +	.org 0x10
>  #ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG

The .org should be within the ifdef. Although it does not change the generated
binary code, but logically it would be a more correct place. Sorry, I should
have mentioned that in the previous mail.

-Gabor
Daniel Schwierzeck - Feb. 1, 2013, 10:48 p.m.
2013/2/1 Gabor Juhos <juhosg@openwrt.org>:
> Hi Daniel,
>
>> From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
>>
>> Adopt reset vector handling from Yamon.
>>
>> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
>
> Looks good, I have only one minor comment below.
>
>> ---
>> Changes for v2:
>> - optimized U-Boot entry point on MIPS32
>> - fix indentation of .org
>>
>> ---
>>  arch/mips/cpu/mips32/start.S | 186 +++++++++----------------------------------
>>  arch/mips/cpu/mips64/start.S |  47 +++++------
>>  2 files changed, 57 insertions(+), 176 deletions(-)
>>
>> diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
>> index 65acf7d..7373d4e 100644
>> --- a/arch/mips/cpu/mips32/start.S
>> +++ b/arch/mips/cpu/mips32/start.S
>> @@ -47,19 +47,16 @@
>>       .set    pop
>>       .endm
>>
>> -#define RVECENT(f,n) \
>> -   b f; nop
>> -#define XVECENT(f,bev) \
>> -   b f     ;           \
>> -   li k0,bev
>> -
>>       .set noreorder
>>
>>       .globl _start
>>       .text
>>  _start:
>> -     RVECENT(reset,0)                        # U-boot entry point
>> -     RVECENT(reset,1)                        # software reboot
>> +     /* U-boot entry point */
>> +     b       reset
>> +      nop
>> +
>> +     .org 0x10
>>  #ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
>
> The .org should be within the ifdef. Although it does not change the generated
> binary code, but logically it would be a more correct place. Sorry, I should
> have mentioned that in the previous mail.
>
> -Gabor
>
>

I think we should keep it outside. If we add qemu-malta, then we get
another #if branch.
I also would like to move some register inits (watch, timer, status)
to slightly reduce
binary size.
thomas.langer@lantiq.com - Feb. 1, 2013, 11:16 p.m.
Hello Daniel,

Daniel Schwierzeck wrote on 2013-02-01:

> 2013/2/1 Gabor Juhos <juhosg@openwrt.org>:
>> Hi Daniel,
>> 
>>> From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
>>> 
>>> Adopt reset vector handling from Yamon.
>>> 
>>> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
>> 
>> Looks good, I have only one minor comment below.
>> 
>>> ---
>>> Changes for v2:
>>> - optimized U-Boot entry point on MIPS32
>>> - fix indentation of .org
>>> 
>>> ---
>>>  arch/mips/cpu/mips32/start.S | 186 +++++++++----------------------------------
>>>  arch/mips/cpu/mips64/start.S |  47 +++++------
>>>  2 files changed, 57 insertions(+), 176 deletions(-)
>>> diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
>>> index 65acf7d..7373d4e 100644
>>> --- a/arch/mips/cpu/mips32/start.S
>>> +++ b/arch/mips/cpu/mips32/start.S
>>> @@ -47,19 +47,16 @@
>>>       .set    pop
>>>       .endm
>>> -#define RVECENT(f,n) \
>>> -   b f; nop
>>> -#define XVECENT(f,bev) \
>>> -   b f     ;           \
>>> -   li k0,bev
>>> -
>>>       .set noreorder
>>>       
>>>       .globl _start
>>>       .text
>>>  _start:
>>> -     RVECENT(reset,0)                        # U-boot entry point
>>> -     RVECENT(reset,1)                        # software reboot
>>> +     /* U-boot entry point */
>>> +     b       reset
>>> +      nop
>>> +
>>> +     .org 0x10
>>>  #ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
>> 
>> The .org should be within the ifdef. Although it does not change the
>> generated binary code, but logically it would be a more correct place.
>> Sorry, I should have mentioned that in the previous mail.
>> 
>> -Gabor
>> 
>> 
> 
> I think we should keep it outside. If we add qemu-malta, then we get
> another #if branch.
> I also would like to move some register inits (watch, timer, status)
> to slightly reduce
> binary size.
>
In addition you could completely remove these exception vectors for u-boot binaries,
which will be loaded from SPI- or NAND-flash (or some other storage, which is not
memory mapped), which typically involves some ROM code.
In this case, the vectors are already part of the ROM.

Best Regards,
Thomas
Gabor Juhos - Feb. 2, 2013, 12:44 a.m.
2013.02.01. 23:48 keltezéssel, Daniel Schwierzeck írta:

>>> +     /* U-boot entry point */
>>> +     b       reset
>>> +      nop
>>> +
>>> +     .org 0x10
>>>  #ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
>>
>> The .org should be within the ifdef. Although it does not change the generated
>> binary code, but logically it would be a more correct place. Sorry, I should
>> have mentioned that in the previous mail.
>>
>> -Gabor
>>
>>
> 
> I think we should keep it outside. If we add qemu-malta, then we get
> another #if branch.

Ok, it does not really matter now. The .org can be moved into the ifdef later
when there will be a board which needs some other magic value at 0x14 for example.

> I also would like to move some register inits (watch, timer, status)
> to slightly reduce
> binary size.

Hm, do you want to initialize those registers between the reserved vectors?

-Gabor

Patch

diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 65acf7d..7373d4e 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -47,19 +47,16 @@ 
 	.set	pop
 	.endm
 
-#define RVECENT(f,n) \
-   b f; nop
-#define XVECENT(f,bev) \
-   b f     ;           \
-   li k0,bev
-
 	.set noreorder
 
 	.globl _start
 	.text
 _start:
-	RVECENT(reset,0)			# U-boot entry point
-	RVECENT(reset,1)			# software reboot
+	/* U-boot entry point */
+	b	reset
+	 nop
+
+	.org 0x10
 #ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
 	/*
 	 * Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to
@@ -69,141 +66,39 @@  _start:
 	 * device with correct parameters. This config option is board-specific.
 	 */
 	.word CONFIG_SYS_XWAY_EBU_BOOTCFG
-	.word 0x00000000
-#else
-	RVECENT(romReserved,2)
+	.word 0x0
 #endif
-	RVECENT(romReserved,3)
-	RVECENT(romReserved,4)
-	RVECENT(romReserved,5)
-	RVECENT(romReserved,6)
-	RVECENT(romReserved,7)
-	RVECENT(romReserved,8)
-	RVECENT(romReserved,9)
-	RVECENT(romReserved,10)
-	RVECENT(romReserved,11)
-	RVECENT(romReserved,12)
-	RVECENT(romReserved,13)
-	RVECENT(romReserved,14)
-	RVECENT(romReserved,15)
-	RVECENT(romReserved,16)
-	RVECENT(romReserved,17)
-	RVECENT(romReserved,18)
-	RVECENT(romReserved,19)
-	RVECENT(romReserved,20)
-	RVECENT(romReserved,21)
-	RVECENT(romReserved,22)
-	RVECENT(romReserved,23)
-	RVECENT(romReserved,24)
-	RVECENT(romReserved,25)
-	RVECENT(romReserved,26)
-	RVECENT(romReserved,27)
-	RVECENT(romReserved,28)
-	RVECENT(romReserved,29)
-	RVECENT(romReserved,30)
-	RVECENT(romReserved,31)
-	RVECENT(romReserved,32)
-	RVECENT(romReserved,33)
-	RVECENT(romReserved,34)
-	RVECENT(romReserved,35)
-	RVECENT(romReserved,36)
-	RVECENT(romReserved,37)
-	RVECENT(romReserved,38)
-	RVECENT(romReserved,39)
-	RVECENT(romReserved,40)
-	RVECENT(romReserved,41)
-	RVECENT(romReserved,42)
-	RVECENT(romReserved,43)
-	RVECENT(romReserved,44)
-	RVECENT(romReserved,45)
-	RVECENT(romReserved,46)
-	RVECENT(romReserved,47)
-	RVECENT(romReserved,48)
-	RVECENT(romReserved,49)
-	RVECENT(romReserved,50)
-	RVECENT(romReserved,51)
-	RVECENT(romReserved,52)
-	RVECENT(romReserved,53)
-	RVECENT(romReserved,54)
-	RVECENT(romReserved,55)
-	RVECENT(romReserved,56)
-	RVECENT(romReserved,57)
-	RVECENT(romReserved,58)
-	RVECENT(romReserved,59)
-	RVECENT(romReserved,60)
-	RVECENT(romReserved,61)
-	RVECENT(romReserved,62)
-	RVECENT(romReserved,63)
-	XVECENT(romExcHandle,0x200)	# bfc00200: R4000 tlbmiss vector
-	RVECENT(romReserved,65)
-	RVECENT(romReserved,66)
-	RVECENT(romReserved,67)
-	RVECENT(romReserved,68)
-	RVECENT(romReserved,69)
-	RVECENT(romReserved,70)
-	RVECENT(romReserved,71)
-	RVECENT(romReserved,72)
-	RVECENT(romReserved,73)
-	RVECENT(romReserved,74)
-	RVECENT(romReserved,75)
-	RVECENT(romReserved,76)
-	RVECENT(romReserved,77)
-	RVECENT(romReserved,78)
-	RVECENT(romReserved,79)
-	XVECENT(romExcHandle,0x280)	# bfc00280: R4000 xtlbmiss vector
-	RVECENT(romReserved,81)
-	RVECENT(romReserved,82)
-	RVECENT(romReserved,83)
-	RVECENT(romReserved,84)
-	RVECENT(romReserved,85)
-	RVECENT(romReserved,86)
-	RVECENT(romReserved,87)
-	RVECENT(romReserved,88)
-	RVECENT(romReserved,89)
-	RVECENT(romReserved,90)
-	RVECENT(romReserved,91)
-	RVECENT(romReserved,92)
-	RVECENT(romReserved,93)
-	RVECENT(romReserved,94)
-	RVECENT(romReserved,95)
-	XVECENT(romExcHandle,0x300)	# bfc00300: R4000 cache vector
-	RVECENT(romReserved,97)
-	RVECENT(romReserved,98)
-	RVECENT(romReserved,99)
-	RVECENT(romReserved,100)
-	RVECENT(romReserved,101)
-	RVECENT(romReserved,102)
-	RVECENT(romReserved,103)
-	RVECENT(romReserved,104)
-	RVECENT(romReserved,105)
-	RVECENT(romReserved,106)
-	RVECENT(romReserved,107)
-	RVECENT(romReserved,108)
-	RVECENT(romReserved,109)
-	RVECENT(romReserved,110)
-	RVECENT(romReserved,111)
-	XVECENT(romExcHandle,0x380)	# bfc00380: R4000 general vector
-	RVECENT(romReserved,113)
-	RVECENT(romReserved,114)
-	RVECENT(romReserved,115)
-	RVECENT(romReserved,116)
-	RVECENT(romReserved,116)
-	RVECENT(romReserved,118)
-	RVECENT(romReserved,119)
-	RVECENT(romReserved,120)
-	RVECENT(romReserved,121)
-	RVECENT(romReserved,122)
-	RVECENT(romReserved,123)
-	RVECENT(romReserved,124)
-	RVECENT(romReserved,125)
-	RVECENT(romReserved,126)
-	RVECENT(romReserved,127)
 
-	/*
-	 * We hope there are no more reserved vectors!
-	 * 128 * 8 == 1024 == 0x400
-	 * so this is address R_VEC+0x400 == 0xbfc00400
-	 */
+	.org 0x200
+	/* TLB refill, 32 bit task */
+1:	b	1b
+	 nop
+
+	.org 0x280
+	/* XTLB refill, 64 bit task */
+1:	b	1b
+	 nop
+
+	.org 0x300
+	/* Cache error exception */
+1:	b	1b
+	 nop
+
+	.org 0x380
+	/* General exception */
+1:	b	1b
+	 nop
+
+	.org 0x400
+	/* Catch interrupt exceptions */
+1:	b	1b
+	 nop
+
+	.org 0x480
+	/* EJTAG debug exception */
+1:	b	1b
+	 nop
+
 	.align 4
 reset:
 
@@ -351,12 +246,3 @@  in_ram:
 	 move	a1, s2
 
 	.end	relocate_code
-
-	/* Exception handlers */
-romReserved:
-	b	romReserved
-	 nop
-
-romExcHandle:
-	b	romExcHandle
-	 nop
diff --git a/arch/mips/cpu/mips64/start.S b/arch/mips/cpu/mips64/start.S
index 1522594..c0ae41a 100644
--- a/arch/mips/cpu/mips64/start.S
+++ b/arch/mips/cpu/mips64/start.S
@@ -52,40 +52,40 @@ 
 	.globl _start
 	.text
 _start:
-	.org 0x000
+	/* U-boot entry point */
 	b	reset
 	 nop
-	.org 0x080
-	b	romReserved
-	 nop
-	.org 0x100
-	b	romReserved
-	 nop
-	.org 0x180
-	b	romReserved
-	 nop
+
 	.org 0x200
-	b	romReserved
+	/* TLB refill, 32 bit task */
+1:	b	1b
 	 nop
+
 	.org 0x280
-	b	romReserved
+	/* XTLB refill, 64 bit task */
+1:	b	1b
 	 nop
+
 	.org 0x300
-	b	romReserved
+	/* Cache error exception */
+1:	b	1b
 	 nop
+
 	.org 0x380
-	b	romReserved
+	/* General exception */
+1:	b	1b
 	 nop
+
+	.org 0x400
+	/* Catch interrupt exceptions */
+1:	b	1b
+	 nop
+
 	.org 0x480
-	b	romReserved
+	/* EJTAG debug exception */
+1:	b	1b
 	 nop
 
-	/*
-	 * We hope there are no more reserved vectors!
-	 * 128 * 8 == 1024 == 0x400
-	 * so this is address R_VEC+0x400 == 0xbfc00400
-	 */
-	.org 0x500
 	.align 4
 reset:
 
@@ -238,8 +238,3 @@  in_ram:
 	 move	a1, s2
 
 	.end	relocate_code
-
-	/* Exception handlers */
-romReserved:
-	b	romReserved
-	 nop