From patchwork Fri Feb 1 12:38:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 217458 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E181F2C0292 for ; Sat, 2 Feb 2013 00:34:51 +1100 (EST) Received: from localhost ([::1]:57242 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U1Fu5-00089h-Kl for incoming@patchwork.ozlabs.org; Fri, 01 Feb 2013 07:39:37 -0500 Received: from eggs.gnu.org ([208.118.235.92]:60327) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U1Ftb-0007G4-7F for qemu-devel@nongnu.org; Fri, 01 Feb 2013 07:39:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U1FtZ-0002Bh-D4 for qemu-devel@nongnu.org; Fri, 01 Feb 2013 07:39:07 -0500 Received: from cantor2.suse.de ([195.135.220.15]:56688 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U1FtY-0002BI-JB; Fri, 01 Feb 2013 07:39:05 -0500 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id E17AFA398F; Fri, 1 Feb 2013 13:39:01 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Fri, 1 Feb 2013 13:38:32 +0100 Message-Id: <1359722312-2391-7-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359722312-2391-1-git-send-email-afaerber@suse.de> References: <1359722312-2391-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Peter Maydell , Alexander Graf , Blue Swirl , Max Filippov , Michael Walle , "open list:PowerPC" , Paul Brook , "Edgar E. Iglesias" , Guan Xuetao , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno , Richard Henderson Subject: [Qemu-devel] [PATCH qom-cpu-next 6/6] cpu: Add CPUArchState pointer to CPUState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The target-specific ENV_GET_CPU() macros have allowed us to navigate from CPUArchState to CPUState. The reverse direction was not supported. Avoid introducing CPU_GET_ENV() macros by initializing an untyped pointer that is initialized in derived instance_init functions. The field may not be called "env" due to it being poisoned. Signed-off-by: Andreas Färber Acked-by: Richard Henderson --- include/qom/cpu.h | 2 ++ target-alpha/cpu.c | 2 ++ target-arm/cpu.c | 2 ++ target-cris/cpu.c | 2 ++ target-i386/cpu.c | 1 + target-lm32/cpu.c | 2 ++ target-m68k/cpu.c | 2 ++ target-microblaze/cpu.c | 2 ++ target-mips/cpu.c | 2 ++ target-openrisc/cpu.c | 2 ++ target-ppc/translate_init.c | 2 ++ target-s390x/cpu.c | 2 ++ target-sh4/cpu.c | 2 ++ target-sparc/cpu.c | 2 ++ target-unicore32/cpu.c | 2 ++ target-xtensa/cpu.c | 2 ++ 16 Dateien geändert, 31 Zeilen hinzugefügt(+) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index c25a997..ee1a7c8 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -71,6 +71,7 @@ struct kvm_run; * @created: Indicates whether the CPU thread has been successfully created. * @stop: Indicates a pending stop request. * @stopped: Indicates the CPU has been artificially stopped. + * @env_ptr: Pointer to subclass-specific CPUArchState field. * @current_tb: Currently executing TB. * @kvm_fd: vCPU file descriptor for KVM. * @@ -100,6 +101,7 @@ struct CPUState { bool stopped; volatile sig_atomic_t exit_request; + void *env_ptr; /* CPUArchState */ struct TranslationBlock *current_tb; int kvm_fd; diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index 0cdae69..cec9989 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -233,9 +233,11 @@ static const TypeInfo ev68_cpu_type_info = { static void alpha_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); AlphaCPU *cpu = ALPHA_CPU(obj); CPUAlphaState *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); tlb_flush(env, 1); diff --git a/target-arm/cpu.c b/target-arm/cpu.c index f54d200..5dfcb74 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -134,9 +134,11 @@ static inline void set_feature(CPUARMState *env, int feature) static void arm_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); ARMCPU *cpu = ARM_CPU(obj); static bool inited; + cs->env_ptr = &cpu->env; cpu_exec_init(&cpu->env); cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal, g_free, g_free); diff --git a/target-cris/cpu.c b/target-cris/cpu.c index fedf641..0bcc139 100644 --- a/target-cris/cpu.c +++ b/target-cris/cpu.c @@ -68,10 +68,12 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp) static void cris_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); CRISCPU *cpu = CRIS_CPU(obj); CPUCRISState *env = &cpu->env; static bool tcg_initialized; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled() && !tcg_initialized) { diff --git a/target-i386/cpu.c b/target-i386/cpu.c index ea0ce0b..8ad8f22 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2164,6 +2164,7 @@ static void x86_cpu_initfn(Object *obj) CPUX86State *env = &cpu->env; static int inited; + cs->env_ptr = env; cpu_exec_init(env); object_property_add(obj, "family", "int", diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index 5f16734..a2badb5 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -56,10 +56,12 @@ static void lm32_cpu_realizefn(DeviceState *dev, Error **errp) static void lm32_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); LM32CPU *cpu = LM32_CPU(obj); CPULM32State *env = &cpu->env; static bool tcg_initialized; + cs->env_ptr = env; cpu_exec_init(env); env->flags = 0; diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c index 42735db..f5a1098 100644 --- a/target-m68k/cpu.c +++ b/target-m68k/cpu.c @@ -154,10 +154,12 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) static void m68k_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); M68kCPU *cpu = M68K_CPU(obj); CPUM68KState *env = &cpu->env; static bool inited; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled() && !inited) { diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index 28b5a88..81359db 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -98,10 +98,12 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) static void mb_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); MicroBlazeCPU *cpu = MICROBLAZE_CPU(obj); CPUMBState *env = &cpu->env; static bool tcg_initialized; + cs->env_ptr = env; cpu_exec_init(env); set_float_rounding_mode(float_round_nearest_even, &env->fp_status); diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 09d6172..4d62031 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -55,9 +55,11 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) static void mips_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); MIPSCPU *cpu = MIPS_CPU(obj); CPUMIPSState *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled()) { diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index d8cc533..72d5e8d 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -75,9 +75,11 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp) static void openrisc_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); OpenRISCCPU *cpu = OPENRISC_CPU(obj); static int inited; + cs->env_ptr = &cpu->env; cpu_exec_init(&cpu->env); #ifndef CONFIG_USER_ONLY diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index d0373d3..baa793c 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -10529,11 +10529,13 @@ static void ppc_cpu_reset(CPUState *s) static void ppc_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); PowerPCCPU *cpu = POWERPC_CPU(obj); PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env = &cpu->env; ppc_def_t *def = pcc->info; + cs->env_ptr = env; cpu_exec_init(env); env->msr_mask = def->msr_mask; diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c index d3a5dbc..b2269e5 100644 --- a/target-s390x/cpu.c +++ b/target-s390x/cpu.c @@ -110,6 +110,7 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp) static void s390_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); S390CPU *cpu = S390_CPU(obj); CPUS390XState *env = &cpu->env; static bool inited; @@ -118,6 +119,7 @@ static void s390_cpu_initfn(Object *obj) struct tm tm; #endif + cs->env_ptr = env; cpu_exec_init(env); #if !defined(CONFIG_USER_ONLY) qemu_register_reset(s390_cpu_machine_reset_cb, cpu); diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c index dc5d756..ef0e621 100644 --- a/target-sh4/cpu.c +++ b/target-sh4/cpu.c @@ -67,9 +67,11 @@ static void superh_cpu_realizefn(DeviceState *dev, Error **errp) static void superh_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); SuperHCPU *cpu = SUPERH_CPU(obj); CPUSH4State *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); env->movcal_backup_tail = &(env->movcal_backup); diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index 10dc709..3d9dcff 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -860,9 +860,11 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) static void sparc_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); SPARCCPU *cpu = SPARC_CPU(obj); CPUSPARCState *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled()) { diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index 7bcf3b3..b7024c8 100644 --- a/target-unicore32/cpu.c +++ b/target-unicore32/cpu.c @@ -93,10 +93,12 @@ static void uc32_cpu_realizefn(DeviceState *dev, Error **errp) static void uc32_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); UniCore32CPU *cpu = UNICORE32_CPU(obj); CPUUniCore32State *env = &cpu->env; static bool inited; + cs->env_ptr = env; cpu_exec_init(env); #ifdef CONFIG_USER_ONLY diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c index 309bb16..785e56d 100644 --- a/target-xtensa/cpu.c +++ b/target-xtensa/cpu.c @@ -69,10 +69,12 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) static void xtensa_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); XtensaCPU *cpu = XTENSA_CPU(obj); CPUXtensaState *env = &cpu->env; static bool tcg_inited; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled() && !tcg_inited) {