From patchwork Thu Jan 31 17:58:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 217236 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E37272C008D for ; Fri, 1 Feb 2013 05:28:04 +1100 (EST) Received: from localhost ([::1]:34366 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U0yPT-0007Nl-8u for incoming@patchwork.ozlabs.org; Thu, 31 Jan 2013 12:58:51 -0500 Received: from eggs.gnu.org ([208.118.235.92]:43693) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U0yOw-00061X-Na for qemu-devel@nongnu.org; Thu, 31 Jan 2013 12:58:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U0yOu-0008Mq-U0 for qemu-devel@nongnu.org; Thu, 31 Jan 2013 12:58:18 -0500 Received: from cantor2.suse.de ([195.135.220.15]:50233 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U0yOu-0008Mf-L2 for qemu-devel@nongnu.org; Thu, 31 Jan 2013 12:58:16 -0500 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 15EB2A3B99; Thu, 31 Jan 2013 18:58:16 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Thu, 31 Jan 2013 18:58:00 +0100 Message-Id: <1359655080-20044-5-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359655080-20044-1-git-send-email-afaerber@suse.de> References: <1359655080-20044-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Subject: [Qemu-devel] [PATCH qom-cpu for-next 4/4] target-m68k: Pass M68kCPU to m68k_set_irq_level() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Simplifies use of cpu_reset_interrupt() et al. Signed-off-by: Andreas Färber --- hw/mcf5206.c | 2 +- hw/mcf_intc.c | 2 +- target-m68k/cpu.h | 2 +- target-m68k/helper.c | 4 +++- 4 Dateien geändert, 6 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-) diff --git a/hw/mcf5206.c b/hw/mcf5206.c index 9bb393e..ea2db23 100644 --- a/hw/mcf5206.c +++ b/hw/mcf5206.c @@ -226,7 +226,7 @@ static void m5206_mbar_update(m5206_mbar_state *s) level = 0; vector = 0; } - m68k_set_irq_level(&s->cpu->env, level, vector); + m68k_set_irq_level(s->cpu, level, vector); } static void m5206_mbar_set_irq(void *opaque, int irq, int level) diff --git a/hw/mcf_intc.c b/hw/mcf_intc.c index 450f622..b213656 100644 --- a/hw/mcf_intc.c +++ b/hw/mcf_intc.c @@ -40,7 +40,7 @@ static void mcf_intc_update(mcf_intc_state *s) } } s->active_vector = ((best == 64) ? 24 : (best + 64)); - m68k_set_irq_level(&s->cpu->env, best_level, s->active_vector); + m68k_set_irq_level(s->cpu, best_level, s->active_vector); } static uint64_t mcf_intc_read(void *opaque, hwaddr addr, diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index ed9be80..2672eae 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -169,7 +169,7 @@ enum { #define MACSR_V 0x002 #define MACSR_EV 0x001 -void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector); +void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector); void m68k_set_macsr(CPUM68KState *env, uint32_t val); void m68k_switch_sp(CPUM68KState *env); diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 7d3fd94..1bae3ab 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -310,8 +310,10 @@ int cpu_m68k_handle_mmu_fault (CPUM68KState *env, target_ulong address, int rw, be handled by the interrupt controller. Real hardware only requests the vector when the interrupt is acknowledged by the CPU. For simplicitly we calculate it when the interrupt is signalled. */ -void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector) +void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector) { + CPUM68KState *env = &cpu->env; + env->pending_level = level; env->pending_vector = vector; if (level)