From patchwork Thu Jan 31 17:57:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 217231 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 5B6682C0086 for ; Fri, 1 Feb 2013 05:01:38 +1100 (EST) Received: from localhost ([::1]:60899 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U0yPN-0006Rz-IM for incoming@patchwork.ozlabs.org; Thu, 31 Jan 2013 12:58:45 -0500 Received: from eggs.gnu.org ([208.118.235.92]:43695) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U0yOw-00062R-VT for qemu-devel@nongnu.org; Thu, 31 Jan 2013 12:58:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U0yOt-0008MC-Ha for qemu-devel@nongnu.org; Thu, 31 Jan 2013 12:58:18 -0500 Received: from cantor2.suse.de ([195.135.220.15]:50228 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U0yOt-0008Ln-75 for qemu-devel@nongnu.org; Thu, 31 Jan 2013 12:58:15 -0500 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 90B5EA0FED; Thu, 31 Jan 2013 18:58:14 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Thu, 31 Jan 2013 18:57:58 +0100 Message-Id: <1359655080-20044-3-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359655080-20044-1-git-send-email-afaerber@suse.de> References: <1359655080-20044-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Subject: [Qemu-devel] [PATCH qom-cpu for-next 2/4] mcf5206: Pass M68kCPU to mcf5206_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Store it in m5206_mbar_state. Prepares for passing M68kCPU to m68k_set_irq_level(). Signed-off-by: Andreas Färber --- hw/an5206.c | 11 +++++++---- hw/mcf.h | 2 +- hw/mcf5206.c | 8 ++++---- 3 Dateien geändert, 12 Zeilen hinzugefügt(+), 9 Zeilen entfernt(-) diff --git a/hw/an5206.c b/hw/an5206.c index 750115a..924be81 100644 --- a/hw/an5206.c +++ b/hw/an5206.c @@ -24,6 +24,7 @@ static void an5206_init(QEMUMachineInitArgs *args) ram_addr_t ram_size = args->ram_size; const char *cpu_model = args->cpu_model; const char *kernel_filename = args->kernel_filename; + M68kCPU *cpu; CPUM68KState *env; int kernel_size; uint64_t elf_entry; @@ -32,12 +33,14 @@ static void an5206_init(QEMUMachineInitArgs *args) MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *sram = g_new(MemoryRegion, 1); - if (!cpu_model) + if (!cpu_model) { cpu_model = "m5206"; - env = cpu_init(cpu_model); - if (!env) { + } + cpu = cpu_m68k_init(cpu_model); + if (!cpu) { hw_error("Unable to find m68k CPU definition\n"); } + env = &cpu->env; /* Initialize CPU registers. */ env->vbr = 0; @@ -55,7 +58,7 @@ static void an5206_init(QEMUMachineInitArgs *args) vmstate_register_ram_global(sram); memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram); - mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, env); + mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, cpu); /* Load kernel. */ if (!kernel_filename) { diff --git a/hw/mcf.h b/hw/mcf.h index f929910..dc21028 100644 --- a/hw/mcf.h +++ b/hw/mcf.h @@ -25,6 +25,6 @@ void mcf_fec_init(struct MemoryRegion *sysmem, NICInfo *nd, /* mcf5206.c */ qemu_irq *mcf5206_init(struct MemoryRegion *sysmem, - uint32_t base, CPUM68KState *env); + uint32_t base, M68kCPU *cpu); #endif diff --git a/hw/mcf5206.c b/hw/mcf5206.c index d8c0059..9bb393e 100644 --- a/hw/mcf5206.c +++ b/hw/mcf5206.c @@ -145,7 +145,7 @@ static m5206_timer_state *m5206_timer_init(qemu_irq irq) /* System Integration Module. */ typedef struct { - CPUM68KState *env; + M68kCPU *cpu; MemoryRegion iomem; m5206_timer_state *timer[2]; void *uart[2]; @@ -226,7 +226,7 @@ static void m5206_mbar_update(m5206_mbar_state *s) level = 0; vector = 0; } - m68k_set_irq_level(s->env, level, vector); + m68k_set_irq_level(&s->cpu->env, level, vector); } static void m5206_mbar_set_irq(void *opaque, int irq, int level) @@ -525,7 +525,7 @@ static const MemoryRegionOps m5206_mbar_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, CPUM68KState *env) +qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, M68kCPU *cpu) { m5206_mbar_state *s; qemu_irq *pic; @@ -541,7 +541,7 @@ qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, CPUM68KState *env) s->timer[1] = m5206_timer_init(pic[10]); s->uart[0] = mcf_uart_init(pic[12], serial_hds[0]); s->uart[1] = mcf_uart_init(pic[13], serial_hds[1]); - s->env = env; + s->cpu = cpu; m5206_mbar_reset(s); return pic;