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[U-Boot,1/5] ARM: OMAP5: Add silicon id support for ES2.0 revision.

Message ID 1359612150-20076-2-git-send-email-r.sricharan@ti.com
State Superseded
Delegated to: Tom Rini
Headers show

Commit Message

SRICHARAN R Jan. 31, 2013, 6:02 a.m. UTC 
Adding the CPU detection suport for OMAP5430 and
OMAP5432 ES2.0 SOCs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
---
 arch/arm/cpu/armv7/omap5/hwinit.c      |   13 +++++++++++--
 arch/arm/include/asm/arch-omap5/omap.h |    2 ++
 arch/arm/include/asm/armv7.h           |    1 +
 arch/arm/include/asm/omap_common.h     |    2 ++
 4 files changed, 16 insertions(+), 2 deletions(-)

Comments

Tom Rini Jan. 31, 2013, 5:19 p.m. UTC | #1 
On Thu, Jan 31, 2013 at 11:32:26AM +0530, R Sricharan wrote:

> Adding the CPU detection suport for OMAP5430 and
> OMAP5432 ES2.0 SOCs.
> 
> Signed-off-by: R Sricharan <r.sricharan@ti.com>

Reviewed-by: Tom Rini <trini@ti.com>
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index dfc0e44..0d8c95d 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -216,8 +216,17 @@  void init_omap_revision(void)
 			break;
 		}
 		break;
-	default:
-		*omap_si_rev = OMAP5430_SILICON_ID_INVALID;
+	case MIDR_CORTEX_A15_R2P2:
+		switch (readl(CONTROL_ID_CODE)) {
+		case OMAP5430_CONTROL_ID_CODE_ES2_0:
+			*omap_si_rev = OMAP5430_ES2_0;
+			break;
+		case OMAP5432_CONTROL_ID_CODE_ES2_0:
+			*omap_si_rev = OMAP5432_ES2_0;
+			break;
+		default:
+			*omap_si_rev = OMAP5430_SILICON_ID_INVALID;
+		}
 	}
 }
 
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 3eb7202..c79d833 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -57,7 +57,9 @@ 
 
 /* To be verified */
 #define OMAP5430_CONTROL_ID_CODE_ES1_0		0x0B94202F
+#define OMAP5430_CONTROL_ID_CODE_ES2_0          0x1B94202F
 #define OMAP5432_CONTROL_ID_CODE_ES1_0		0x0B99802F
+#define OMAP5432_CONTROL_ID_CODE_ES2_0          0x1B99802F
 
 /* STD_FUSE_PROD_ID_1 */
 #define STD_FUSE_PROD_ID_1		(CTRL_BASE + 0x218)
diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index ad9a875..a73630b 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -33,6 +33,7 @@ 
 
 /* Cortex-A15 revisions */
 #define MIDR_CORTEX_A15_R0P0	0x410FC0F0
+#define MIDR_CORTEX_A15_R2P2	0x412FC0F2
 
 /* CCSIDR */
 #define CCSIDR_LINE_SIZE_OFFSET		0
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index ef1621f..03cf7d7 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -542,4 +542,6 @@  static inline u32 omap_revision(void)
 #define OMAP5430_SILICON_ID_INVALID	0
 #define OMAP5430_ES1_0	0x54300100
 #define OMAP5432_ES1_0	0x54320100
+#define OMAP5430_ES2_0  0x54300200
+#define OMAP5432_ES2_0  0x54320200
 #endif /* _OMAP_COMMON_H_ */