From patchwork Tue Jan 29 23:51:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen Martin X-Patchwork-Id: 216734 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B18CB2C0095 for ; Wed, 30 Jan 2013 10:53:33 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0E1D34A1B4; Wed, 30 Jan 2013 00:52:53 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6ilWCgkmvNxU; Wed, 30 Jan 2013 00:52:52 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 780904A1A6; Wed, 30 Jan 2013 00:52:09 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F16154A16A for ; Wed, 30 Jan 2013 00:51:58 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Pj4pUHm3fzjd for ; Wed, 30 Jan 2013 00:51:47 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from hqemgate03.nvidia.com (hqemgate03.nvidia.com [216.228.121.140]) by theia.denx.de (Postfix) with ESMTPS id 39B654A11C for ; Wed, 30 Jan 2013 00:51:38 +0100 (CET) Received: from hqnvupgp05.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Tue, 29 Jan 2013 15:55:59 -0800 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp05.nvidia.com (PGP Universal service); Tue, 29 Jan 2013 15:51:35 -0800 X-PGP-Universal: processed; by hqnvupgp05.nvidia.com on Tue, 29 Jan 2013 15:51:35 -0800 Received: from badger.nvidia.com (172.20.144.16) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server id 8.3.297.1; Tue, 29 Jan 2013 15:51:35 -0800 From: Allen Martin To: , , Date: Tue, 29 Jan 2013 15:51:26 -0800 Message-ID: <1359503489-17622-5-git-send-email-amartin@nvidia.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359503489-17622-1-git-send-email-amartin@nvidia.com> References: <1359503489-17622-1-git-send-email-amartin@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v4 4/7] tegra30: fdt: add SPI SLINK nodes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add tegra30 SPI SLINK nodes to fdt. Signed-off-by: Allen Martin Acked-by: Simon Glass --- arch/arm/dts/tegra30.dtsi | 72 +++++++++++++++++++++++++++++++++++ board/nvidia/dts/tegra30-cardhu.dts | 5 +++ 2 files changed, 77 insertions(+) diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi index aa7e7ae..7b8126f 100644 --- a/arch/arm/dts/tegra30.dtsi +++ b/arch/arm/dts/tegra30.dtsi @@ -90,4 +90,76 @@ /* PERIPH_ID_I2C_DVC, CLK_M */ clocks = <&tegra_car 47>; }; + + spi@7000d400 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000d400 0x200>; + interrupts = <0 59 0x04>; + nvidia,dma-request-selector = <&apbdma 15>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC1, PLLP_OUT0 */ + clocks = <&tegra_car 41>; + }; + + spi@7000d600 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000d600 0x200>; + interrupts = <0 82 0x04>; + nvidia,dma-request-selector = <&apbdma 16>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC2, PLLP_OUT0 */ + clocks = <&tegra_car 44>; + }; + + spi@7000d800 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000d480 0x200>; + interrupts = <0 83 0x04>; + nvidia,dma-request-selector = <&apbdma 17>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC3, PLLP_OUT0 */ + clocks = <&tegra_car 46>; + }; + + spi@7000da00 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000da00 0x200>; + interrupts = <0 93 0x04>; + nvidia,dma-request-selector = <&apbdma 18>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC4, PLLP_OUT0 */ + clocks = <&tegra_car 68>; + }; + + spi@7000dc00 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000dc00 0x200>; + interrupts = <0 94 0x04>; + nvidia,dma-request-selector = <&apbdma 27>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC5, PLLP_OUT0 */ + clocks = <&tegra_car 104>; + }; + + spi@7000de00 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000de00 0x200>; + interrupts = <0 79 0x04>; + nvidia,dma-request-selector = <&apbdma 28>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC6, PLLP_OUT0 */ + clocks = <&tegra_car 105>; + }; }; diff --git a/board/nvidia/dts/tegra30-cardhu.dts b/board/nvidia/dts/tegra30-cardhu.dts index 3223ed4..f9f80c5 100644 --- a/board/nvidia/dts/tegra30-cardhu.dts +++ b/board/nvidia/dts/tegra30-cardhu.dts @@ -39,4 +39,9 @@ i2c@7000d000 { clock-frequency = <100000>; }; + + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + }; };