From patchwork Tue Jan 29 10:37:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Otavio Salvador X-Patchwork-Id: 216492 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 8DA922C0093 for ; Tue, 29 Jan 2013 21:33:55 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CB5694A0FE; Tue, 29 Jan 2013 11:33:11 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fe9QYaKVUwRB; Tue, 29 Jan 2013 11:33:11 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 729324A11C; Tue, 29 Jan 2013 11:33:10 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0BFBD4A116 for ; Tue, 29 Jan 2013 11:32:55 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id lIXjGTx6obUp for ; Tue, 29 Jan 2013 11:32:53 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-gh0-f175.google.com (mail-gh0-f175.google.com [209.85.160.175]) by theia.denx.de (Postfix) with ESMTPS id 30F6B4A0FE for ; Tue, 29 Jan 2013 11:32:50 +0100 (CET) Received: by mail-gh0-f175.google.com with SMTP id g18so18702ghb.6 for ; Tue, 29 Jan 2013 02:32:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=pAXw7azTuuiqyzJ+i5yzlQ2lI9dHbMKML2NbQIFlAX8=; b=bwdaswdL7beFl6WRRlvuh3f5zVIRX5PMmk+HLs9JR7RmPCje/KcqLli/NeROInUvR5 oxcItLMo063jbZoWIo84KEC+IKExThj79yv55f7nJyl1AsxaRmENWrPfP+HkB3vCN5Nh zNt2LTjyjvtVpxpnO2uVoIY0+2CDkfeGtve5agBA5Ix7pOGgSbOH3Fp3JXET/zeDdOjC YMx0dN/vZU7mM0jN1lRgy0pkslomyMDImz+yidcPi3XzBSoODiG7UBYXHazuBsdZqyzc oHPcGFYuNbYBMSxES+w7AeS1lkVxtFwCrZ6vLaRy6Oc8//x0d/8kjCvihAB333tgBu6V Hl9A== X-Received: by 10.236.83.114 with SMTP id p78mr416668yhe.92.1359455567689; Tue, 29 Jan 2013 02:32:47 -0800 (PST) Received: from nano.lab.ossystems.com.br ([177.35.66.48]) by mx.google.com with ESMTPS id b54sm13005193yhj.19.2013.01.29.02.32.45 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 29 Jan 2013 02:32:47 -0800 (PST) From: Otavio Salvador To: u-boot@lists.denx.de Date: Tue, 29 Jan 2013 08:37:03 -0200 Message-Id: <1359455824-24058-2-git-send-email-otavio@ossystems.com.br> X-Mailer: git-send-email 1.8.1 In-Reply-To: <1359455824-24058-1-git-send-email-otavio@ossystems.com.br> References: <1359455824-24058-1-git-send-email-otavio@ossystems.com.br> Cc: Fabio Estevam , Marek Vasut , Otavio Salvador Subject: [U-Boot] [PATCH v3 2/3] mx23: Document the tRAS lockout setting in memory initialization X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to enable the 'Fast Auto Pre-Charge' found in the memory chip. The setting is applied after memory initialization and it is worth document it. Signed-off-by: Otavio Salvador --- Changes in v3: - Revert initialization change and comment the code Changes in v2: - Improve commit message arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index f8392f6..37b50e9 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -119,6 +119,7 @@ static void initialize_dram_values(void) writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); #ifdef CONFIG_MX23 + /* Enable tRAS lockout in HW_DRAM_CTL08 */ writel((1 << 24), MXS_DRAM_BASE + (4 * 8)); #endif }