Patchwork [AArch64,AArch64-4.7] Backport Optimize cmp in some cases patch

login
register
mail settings
Submitter Venkataramanan Kumar
Date Jan. 27, 2013, 8:46 a.m.
Message ID <CAJK_mQ1E5=VK58oMLgj1h1FwJ=2OAj+mZvs1C4ciZXzw5_W+vw@mail.gmail.com>
Download mbox | patch
Permalink /patch/215971/
State New
Headers show

Comments

Venkataramanan Kumar - Jan. 27, 2013, 8:46 a.m.
Hi Maintainers,

The attached patch backports the gcc trunk patch
http://gcc.gnu.org/ml/gcc-patches/2013-01/msg00143.html to
"ARM/aarch64-4.7-branch" branch.

ChangeLog.aarch64

2013-01-27 Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>

        Backport from mainline.
        2013-01-04  Andrew Pinski  <apinski@cavium.com>

        * config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs):
        New function.
        (TARGET_FIXED_CONDITION_CODE_REGS): Define

Path is attached. Please let me know if I can change "-1" to
"INVALID_REGNUM" and commit.

Built gcc and tested the gcc testsuites for the aarch64-none-elf
target with ARMv8 Foundation model. No new regressions.

Ok to for the ARM/aarch64-4.7-branch ?

regards,
Venkat.
Marcus Shawcroft - Feb. 1, 2013, 2 p.m.
On 27/01/13 08:46, Venkataramanan Kumar wrote:
> Hi Maintainers,
>
> The attached patch backports the gcc trunk patch
> http://gcc.gnu.org/ml/gcc-patches/2013-01/msg00143.html to
> "ARM/aarch64-4.7-branch" branch.
>
> ChangeLog.aarch64
>
> 2013-01-27 Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
>
>          Backport from mainline.
>          2013-01-04  Andrew Pinski  <apinski@cavium.com>
>
>          * config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs):
>          New function.
>          (TARGET_FIXED_CONDITION_CODE_REGS): Define
>
> Path is attached. Please let me know if I can change "-1" to
> "INVALID_REGNUM" and commit.
>
> Built gcc and tested the gcc testsuites for the aarch64-none-elf
> target with ARMv8 Foundation model. No new regressions.
>
> Ok to for the ARM/aarch64-4.7-branch ?


This is fine. Thank you. Please commit.

/Marcus

Patch

Index: gcc/config/aarch64/aarch64.c
===================================================================
--- gcc/config/aarch64/aarch64.c	(revision 195486)
+++ gcc/config/aarch64/aarch64.c	(working copy)
@@ -2971,6 +2971,16 @@ 
   return REAL_VALUES_EQUAL (r, dconst0);
 }
 
+/* Return the fixed registers used for condition codes.  */
+
+static bool
+aarch64_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
+{
+  *p1 = CC_REGNUM;
+  *p2 = -1;
+  return true;
+}
+
 enum machine_mode
 aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y)
 {
@@ -7809,6 +7819,9 @@ 
 #undef TARGET_EXPAND_BUILTIN_VA_START
 #define TARGET_EXPAND_BUILTIN_VA_START aarch64_expand_builtin_va_start
 
+#undef TARGET_FIXED_CONDITION_CODE_REG
+#define TARGET_FIXED_CONDITION_CODE_REGS aarch64_fixed_condition_code_regs
+
 #undef TARGET_FUNCTION_ARG
 #define TARGET_FUNCTION_ARG aarch64_function_arg
 
Index: gcc/testsuite/gcc.target/aarch64/cmp-1.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/cmp-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/aarch64/cmp-1.c	(working copy)
@@ -0,0 +1,15 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int f(int a, int b)
+{
+  if(a<b)
+    return 1;
+  if(a>b)
+    return -1;
+  return 0;
+}
+
+/* We should optimize away the second cmp. */
+/* { dg-final { scan-assembler-times "cmp\tw" 1 } } */
+