Message ID | 001601cdfb29$38714270$a953c750$@yorsh@arm.com |
---|---|
State | New |
Headers | show |
On 01/25/13 18:24, Greta Yorsh wrote: > Improve handling of call insns in cortex-a7 pipeline description, as > follows. > > A call can dual-issue as a younger instruction but not as an older > instruction (from compiler's point of view). This patch adjusts the function > cortexa7_younger (used by the implementation of TARGET_SCHED_REORDER hook) > to return true for calls. The patch also updates the pipeline description > for calls to allow either dual-issue as a younger instruction or > single-issue. > > gcc/ > > 2013-01-03 Greta Yorsh <Greta.Yorsh@arm.com> > > * config/arm/arm.c (cortexa7_younger): Return true for TYPE_CALL. > * config/arm/cortex-a7.md (cortex_a7_call): Update required units. > Ok. Ramana
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index ab6c88b..9f61722 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -8746,6 +8746,7 @@ cortexa7_younger (FILE *file, int verbose, rtx insn) case TYPE_SIMPLE_ALU_IMM: case TYPE_SIMPLE_ALU_SHIFT: case TYPE_BRANCH: + case TYPE_CALL: return true; default: return false; --- a/gcc/config/arm/cortex-a7.md 2013-01-03 13:28:19.000000000 +0000 +++ b/gcc/config/arm/cortex-a7.md 2013-01-03 12:33:15.000000000 +0000 @@ -80,12 +80,15 @@ (eq_attr "neon_type" "none"))) "(cortex_a7_ex2|cortex_a7_ex1)+cortex_a7_branch") -;; A call reserves all issue slots. The result is available the next cycle. +;; Call cannot dual-issue as an older instruction. It can dual-issue +;; as a younger instruction, or single-issue. Call cannot dual-issue +;; with another branch instruction. The result is available the next +;; cycle. (define_insn_reservation "cortex_a7_call" 1 (and (eq_attr "tune" "cortexa7") (and (eq_attr "type" "call") (eq_attr "neon_type" "none"))) - "cortex_a7_all") + "(cortex_a7_ex2|cortex_a7_both)+cortex_a7_branch") ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ALU instructions.