Patchwork [U-Boot,v5,2/2] board: add support for amcore board

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Submitter Angelo Dureghello
Date Jan. 25, 2013, 10:43 a.m.
Message ID <20130125104307.GA3223@sion.sysam>
Download mbox | patch
Permalink /patch/215615/
State Superseded
Delegated to: Jason Jin
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Comments

Angelo Dureghello - Jan. 25, 2013, 10:43 a.m.
Add support for Sysam AMCORE mcf5307 (coldfire) based board.

Signed-off-by: Angelo Dureghello <sysamfw@gmail.com>
Cc: Jason Jin <jason.jin@freescale.com>
---
Changes for v2:
- None
Changes for v3:
- Fix code format issues
Changes for v4:
- Add MAINTAINERS file entry
- Remove all unnecessary blank lines 
- Add get_ram_size in sdram init 
- Reuse already existing sdram test routine
- Remove custom flash.c, used std mtd/CFI driver
Changes for v5:
- Fix MAINTAINERS bad sorted entry
- Fix incorrect indentation
- Remove #undef where not needed
- Fix CONFIG_SYS_SDRAM_SIZE to be in bytes
---
 MAINTAINERS                        |    4 +
 board/sysam/amcore/Makefile        |   43 ++++++
 board/sysam/amcore/amcore.c        |  159 +++++++++++++++++++++
 board/sysam/amcore/config.mk       |   23 +++
 board/sysam/amcore/u-boot.lds      |  101 ++++++++++++++
 boards.cfg                         |    1 +
 include/configs/amcore.h           |  209 +++++++++++++++++++++++++++
 7 files changed, 540 insertions(+), 0 deletions(-)
Wolfgang Denk - Jan. 25, 2013, 12:30 p.m.
Dear Angelo Dureghello,

In message <20130125104307.GA3223@sion.sysam> you wrote:
> Add support for Sysam AMCORE mcf5307 (coldfire) based board.

Sorry for the late catch - this escaped me so far...

> Changes for v5:
> - Fix MAINTAINERS bad sorted entry
> - Fix incorrect indentation
> - Remove #undef where not needed

Did you? I still see some...

> +#if defined(CONFIG_SYS_DRAM_TEST)
> +/* memory test */
> +int testdram(void)
...
> +#endif

This is:

1) dead code, as you don't define CONFIG_SYS_DRAM_TEST
2) an obsolete approach that you should not use.  We have a several
   different (and much more reliable) memory tests already - if yuou
   really need one, then please use the existing code.  On the other
   hand, you are using get_ram_size, which already includes a simple
   memory test - so re you sure you really need an extra test?


> +#undef	CONFIG_SYS_DRAM_TEST		/* default undef */

==> remove.

> +/* bypass PLL for test purpose */
> +#undef	CONFIG_SYS_PLL_BYPASS

???


Best regards,

Wolfgang Denk
Angelo Dureghello - Jan. 25, 2013, 2:04 p.m.
Dear Wolfgang,

thanks for the review, 

On Fri, Jan 25, 2013 at 01:30:54PM +0100, Wolfgang Denk wrote:
> Dear Angelo Dureghello,
> 
> In message <20130125104307.GA3223@sion.sysam> you wrote:
> > Add support for Sysam AMCORE mcf5307 (coldfire) based board.
> 
> Sorry for the late catch - this escaped me so far...
> 
> > Changes for v5:
> > - Fix MAINTAINERS bad sorted entry
> > - Fix incorrect indentation
> > - Remove #undef where not needed
> 
> Did you? I still see some...
> 
> > +#if defined(CONFIG_SYS_DRAM_TEST)
> > +/* memory test */
> > +int testdram(void)
> ...
> > +#endif
> 
> This is:
> 
> 1) dead code, as you don't define CONFIG_SYS_DRAM_TEST
> 2) an obsolete approach that you should not use.  We have a several
>    different (and much more reliable) memory tests already - if yuou
>    really need one, then please use the existing code.  On the other
>    hand, you are using get_ram_size, which already includes a simple
>    memory test - so re you sure you really need an extra test?
> 
> 
> > +#undef	CONFIG_SYS_DRAM_TEST		/* default undef */
> 

I used the sdram test for some help when soldering here the prototypes. 
Then i disabled the test. As you already asked me, i removed my own
sdram test function and used one already used from other boards, and
added this in the amcore.c top coments.

 * Copy memory testdram() from sandburst/common/sb_common.c

Anyway, as you said, get_ram_size is enough for me. I will remove
CONFIG_SYS_DRAM_TEST and so "int testdram(void)" content.


> ==> remove.
> 
> > +/* bypass PLL for test purpose */
> > +#undef	CONFIG_SYS_PLL_BYPASS
> 
> ???
> 

I apologize, forget out, fixed.

If you haven't seen anything else, i'll post next V6 shortly.

Best Regards,
Angelo Dureghello

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index 28c052d..f3a6d39 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -149,6 +149,10 @@  Wolfgang Denk <wd@denx.de>
 	PCIPPC2		MPC750
 	PCIPPC6		MPC750
 
+Angelo Dureghello <sysamfw@gmail.com>
+
+        amcore          mcf5307
+
 Phil Edworthy <phil.edworthy@renesas.com>
 
 	rsk7264		SH7264
diff --git a/board/sysam/amcore/Makefile b/board/sysam/amcore/Makefile
new file mode 100644
index 0000000..1fd25a8
--- /dev/null
+++ b/board/sysam/amcore/Makefile
@@ -0,0 +1,43 @@ 
+#
+# Copyright (c) 2011 Angelo Dureghello <sysamfw@gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	= $(BOARD).o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c
new file mode 100644
index 0000000..53ef1f5
--- /dev/null
+++ b/board/sysam/amcore/amcore.c
@@ -0,0 +1,159 @@ 
+/*
+ * Copyright (c) 2012 Angelo Dureghello <sysamfw@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Copy memory testdram() from sandburst/common/sb_common.c
+ */
+
+#include <common.h>
+#include <asm/immap.h>
+#include <asm/io.h>
+
+void init_lcd(void)
+{
+	/*
+	 * board can have a K0108 lcd connected on the parallel port,
+	 * wired as below:
+	 *
+	 * fc cpu   P0  P1  P2  P3  P4  P5  P6  P7  P10 P11 P12 P13 P14
+	 * lcd      D0  D1  D2  D3  D4  D5  D6  D7  CS1 CS2 RW  DI  E
+	 *
+	 * Starting up setting lines in high impedance
+	 */
+	sim_t *sim = (sim_t *)(MMAP_SIM);
+
+	out_be16(&sim->par, 0x300);
+
+	gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
+
+	out_be16(&gpio->paddr, 0xfcff);
+	out_be16(&gpio->padat, 0x0c00);
+}
+
+int checkboard(void)
+{
+	puts("Board: ");
+	puts("AMCORE v.001(alpha)\n");
+
+	init_lcd();
+
+	return 0;
+}
+
+/*
+ * in initdram we are here executing from flash
+ * case 1:
+ * is with no ACR/flash cache enabled
+ * nop = 40ns (scope measured)
+ */
+void fudelay(int usec)
+{
+	while (usec--)
+		asm volatile ("nop");
+}
+
+phys_size_t initdram(int board_type)
+{
+	u32 dramsize, RC;
+
+	dramctrl_t *dc = (dramctrl_t *)(MMAP_DRAMC);
+
+	/*
+	 * SDRAM  MT48LC4M32B2 details
+	 * Memory block 0: 16 MB of SDRAM at address $00000000
+	 * Port size: 32-bit port
+	 *
+	 * Memory block 0 wired as follows:
+	 * CPU   : A15 A14 A13 A12 A11 A10 A9 A17 A18 A19 A20 A21 A22 A23
+	 * SDRAM :  A0  A1  A2  A3  A4  A5  A6 A7  A8  A9 A10 A11 BA0 BA1
+	 *
+	 * Ensure that there is a delay of at least 100 microseconds from
+	 * processor reset to the following code so that the SDRAM is ready
+	 * for commands.
+	 */
+	fudelay(100);
+
+	/*
+	 * DCR
+	 * set proper  RC as per specification
+	 */
+	RC = (CONFIG_SYS_CPU_CLK / 1000000) >> 1;
+	RC = (RC * 15) >> 4;
+
+	/* 0x8000 is the faster option */
+	out_be16(&dc->dcr, 0x8200 | RC);
+
+	/*
+	 * DACR0, page mode continuous, CMD on A20 0x0300
+	 */
+	out_be32(&dc->dacr0, 0x00003304);
+
+	dramsize = ((CONFIG_SYS_SDRAM_SIZE)-1) & 0xfffc0000;
+	out_be32(&dc->dmr0,  dramsize|1);
+
+	/* issue a PRECHARGE ALL */
+	out_be32(&dc->dacr0, 0x0000330c);
+	out_be32(0x00000004, 0xbeaddeed);
+	/* issue AUTOREFRESH */
+	out_be32(&dc->dacr0, 0x0000b304);
+	/* let refresh occour */
+	fudelay(1);
+
+	out_be32(&dc->dacr0, 0x0000b344);
+	out_be32(0x00000c00, 0xbeaddeed);
+
+	return get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE);
+}
+
+#if defined(CONFIG_SYS_DRAM_TEST)
+/* memory test */
+int testdram(void)
+{
+	uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
+	uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
+	uint *p;
+
+	printf("Testing SDRAM: ");
+	for (p = pstart; p < pend; p++)
+		*p = 0xaaaaaaaa;
+
+	for (p = pstart; p < pend; p++) {
+		if (*p != 0xaaaaaaaa) {
+			printf("SDRAM test fails at: %08x\n", (uint) p);
+			return 1;
+		}
+	}
+
+	for (p = pstart; p < pend; p++)
+		*p = 0x55555555;
+
+	for (p = pstart; p < pend; p++) {
+		if (*p != 0x55555555) {
+			printf("SDRAM test fails at: %08x\n", (uint) p);
+			return 1;
+		}
+	}
+
+	printf("OK\n");
+
+	return 0;
+}
+#endif
+
diff --git a/board/sysam/amcore/config.mk b/board/sysam/amcore/config.mk
new file mode 100644
index 0000000..cb45c2c
--- /dev/null
+++ b/board/sysam/amcore/config.mk
@@ -0,0 +1,23 @@ 
+#
+# Copyright (c) 2011 Angelo Dureghello <sysamfw@gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+CONFIG_SYS_TEXT_BASE = 0xffc00000
diff --git a/board/sysam/amcore/u-boot.lds b/board/sysam/amcore/u-boot.lds
new file mode 100644
index 0000000..ccb770d
--- /dev/null
+++ b/board/sysam/amcore/u-boot.lds
@@ -0,0 +1,101 @@ 
+/*
+ * Copyright (c) 2011 Angelo Dureghello <sysamfw@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  .text      :
+  {
+    arch/m68k/cpu/mcf530x/start.o		(.text)
+
+    . = DEFINED(env_offset) ? env_offset : .;
+    common/env_embedded.o	(.text)
+
+    *(.text)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+  }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+
+  .reloc   :
+  {
+    __got_start = .;
+    KEEP(*(.got))
+    __got_end = .;
+    _GOT2_TABLE_ = .;
+    KEEP(*(.got2))
+    _FIXUP_TABLE_ = .;
+    KEEP(*(.fixup))
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.sdata)
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+
+  . = ALIGN(4);
+  .u_boot_list : {
+        #include <u-boot.lst>
+  }
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss (NOLOAD)       :
+  {
+   _sbss = .;
+   *(.sbss*)
+   *(.bss*)
+   *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
+  }
+  __bss_end__ = . ;
+  PROVIDE (end = .);
+}
diff --git a/boards.cfg b/boards.cfg
index e4b0d44..6e9b952 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -388,6 +388,7 @@  M5271EVB                     m68k        mcf52x2     m5271evb            freesca
 M5272C3                      m68k        mcf52x2     m5272c3             freescale
 M5275EVB                     m68k        mcf52x2     m5275evb            freescale
 M5282EVB                     m68k        mcf52x2     m5282evb            freescale
+amcore                       m68k        mcf530x     amcore              sysam
 astro_mcf5373l               m68k        mcf532x     mcf5373l            astro
 M53017EVB                    m68k        mcf532x     m53017evb           freescale
 M5329AFEE                    m68k        mcf532x     m5329evb            freescale      -           M5329EVB:NANDFLASH_SIZE=0
diff --git a/include/configs/amcore.h b/include/configs/amcore.h
new file mode 100644
index 0000000..a54f49b
--- /dev/null
+++ b/include/configs/amcore.h
@@ -0,0 +1,209 @@ 
+/*
+ * Configuation settings for the Sysam AMCORE board.
+ *
+ * Copyright (c) 2012 Angelo Dureghello <sysamfw@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _AMCORE_H
+#define _AMCORE_H
+
+/*
+ * AMCORE flash memory map
+ *
+ * As per CONFIG_SYS_SST_SECTSZ, amcore SST39VF3201B flash
+ * is organized into 1024 x 4K small secotrs (total 4MB).
+ *
+ * 0xffc00000     flash start
+ * 0xffc00000     u-boot code (128-4kB)
+ * 0xffc1f000     u-boot env  (4kB)
+ * -----------------------------------------
+ * 0xffc20000 to
+ * 0xffffffff     reserved for os usage
+ */
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MCF530x			/* define processor family */
+#define CONFIG_M5307			/* define processor type */
+
+#define CONFIG_MCFTMR
+#define CONFIG_MCFUART
+#define CONFIG_SYS_UART_PORT		0
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600 , 19200 , 38400 , \
+					  57600, 115200 }
+
+/* autoboot delay in seconds */
+#define CONFIG_BOOTDELAY   1
+/* autoboot command   */
+#define CONFIG_BOOTCOMMAND "bootm ffc20000"
+
+/*
+ * Command line configuration.
+ */
+
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_TIMER
+#define CONFIG_CMD_DIAG
+
+#define CONFIG_SYS_PROMPT		"amcore$ "
+#undef	CONFIG_SYS_LONGHELP		/* undef to save memory	*/
+
+#if defined(CONFIG_CMD_KGDB)
+/* Console I/O buff. size */
+#define CONFIG_SYS_CBSIZE		1024
+#else
+#define CONFIG_SYS_CBSIZE		256
+#endif
+/* Print buffer size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					 sizeof(CONFIG_SYS_PROMPT)+16)
+/* max number of command args	*/
+#define CONFIG_SYS_MAXARGS		16
+/* Boot argument buffer size	*/
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_CONSOLE_INFO_QUIET	1 /* no console @ startup	*/
+#define CONFIG_AUTO_COMPLETE		1 /* add autocompletion support	*/
+#define CONFIG_LOOPW			1 /* enable loopw command	*/
+#define CONFIG_MX_CYCLIC		1 /* enable mdc/mwc commands	*/
+
+#define CONFIG_SYS_LOAD_ADDR		0x20000	/* default load address */
+
+#undef	CONFIG_SYS_DRAM_TEST		/* default undef */
+#define CONFIG_SYS_MEMTEST_START	0x0
+#define CONFIG_SYS_MEMTEST_END		0x1000000
+
+#define CONFIG_SYS_HZ			1000
+
+/*
+ * Clock configuration: enable only one of the following options
+ */
+
+/* bypass PLL for test purpose */
+#undef	CONFIG_SYS_PLL_BYPASS
+/* MCF5307 cpu run at 90MHz, set as bus clock x 2   */
+#define CONFIG_SYS_CLK			45000000
+#define CONFIG_SYS_CPU_CLK		(CONFIG_SYS_CLK * 2)
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+#define CONFIG_SYS_MBAR			0x10000000 /* Register Base Addrs */
+
+/*
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
+#define CONFIG_SYS_INIT_RAM_SIZE	0x1000	/* size of used SRAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
+					 GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
+
+/*
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
+ */
+#define CONFIG_SYS_SDRAM_BASE		0x00000000
+#define CONFIG_SYS_SDRAM_SIZE		0x1000000   /* in Bytes */
+#define CONFIG_SYS_FLASH_BASE		0xffc00000
+#define CONFIG_SYS_TEXT_BASE		0xffc00000
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	1024
+#define CONFIG_SYS_FLASH_ERASE_TOUT	1000
+
+/*
+ * CFI FLASH driver setup
+ */
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+/* amcore design has flash data bytes wired swapped */
+#define CONFIG_SYS_WRITE_SWAPPED_DATA
+
+/* reserve 128-4KB */
+#define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
+#define CONFIG_SYS_MONITOR_LEN          ((128-4)*1024)
+#define CONFIG_SYS_MALLOC_LEN		(1*1024*1024)
+#define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
+
+#define CONFIG_ENV_IS_IN_FLASH		1
+#define CONFIG_ENV_ADDR			(CONFIG_SYS_FLASH_BASE + \
+					 CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_SIZE			0x1000     /* Size of env. data */
+#define CONFIG_ENV_SECT_SIZE		0x1000     /* see README */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_SIZE << 20)
+
+/*
+ * Cache Configuration
+ *
+ * Special 8K version 3 core cache.
+ * This is a single unified instruction/data cache.
+ * sdram - single region - no masks
+ */
+#define CONFIG_SYS_CACHELINE_SIZE	16
+
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_SIZE - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_SIZE - 4)
+#define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINVA)
+#define CONFIG_SYS_CACHE_ACR0		(CF_ACR_CM_WT | CF_ACR_SM_ALL | \
+					 CF_ACR_EN)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_DCM_P | CF_CACR_ESB | \
+					 CF_CACR_EC)
+
+/*
+ * Memory bank definitions
+ */
+
+/* CS0 - AMD Flash, address 0xffc00000 */
+#define	CONFIG_SYS_CS0_BASE		(CONFIG_SYS_FLASH_BASE>>16)
+/* 4MB, AA=0,V=1  C/I BIT for errata */
+#define	CONFIG_SYS_CS0_MASK		0x003f0001
+/* WS=10, AA=1, PS=16bit (10) */
+#define	CONFIG_SYS_CS0_CTRL		0x1980
+
+
+/* CS1 - DM9000 Ethernet Controller, address 0x30000000 */
+#define CONFIG_SYS_CS1_BASE		0x3000
+#define CONFIG_SYS_CS1_MASK		0x00070001
+#define CONFIG_SYS_CS1_CTRL		0x0100
+
+#endif  /*_AMCORE_H*/