Patchwork [GIT,PULL,v2] Renesas ARM-based SoC for v3.9

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Submitter Simon Horman
Date Jan. 25, 2013, 3:55 a.m.
Message ID <1359086133-23357-1-git-send-email-horms+renesas@verge.net.au>
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Permalink /patch/215543/
State New
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Pull-request

git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git soc

Comments

Simon Horman - Jan. 25, 2013, 3:55 a.m.
Hi Olof, Hi Arnd,

please consider the following soc enhancements for 3.9.

This series is based on a merge of the irqchip/gic-vic-move and
timer/cleanup branches in the arm-soc tree. There were a number of
conflicts in this merge, as indicated by the merge commit
6265b0f325eed54558b35769aecb1d79423295c7. In each case I took care to
match the merge made in the arm-soc tree which is evident in the for-next
branch.

----------------------------------------------------------------
The following changes since commit 6265b0f325eed54558b35769aecb1d79423295c7:

  Merge remote-tracking branches 'arm-soc/irqchip/gic-vic-move' and 'arm-soc/timer/cleanup' into soc (2013-01-24 17:57:20 +0900)

are available in the git repository at:


  git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git soc

for you to fetch changes up to ff8de98d50e551057978ea90d09255c528fde1ac:

  ARM: shmobile: r8a7779: scif .irqs used SCIx_IRQ_MUXED() (2013-01-25 12:43:50 +0900)

----------------------------------------------------------------
Bastian Hecht (4):
      ARM: shmobile: sh73a0: Add CPU sleep suspend
      ARM: shmobile: r8a7740: Add CPU sleep suspend
      ARM: SH-Mobile: sh73a0: Secondary CPUs handle own SCU flags
      ARM: SH-Mobile: sh73a0: Add CPU Hotplug

Guennadi Liakhovetski (3):
      ARM: sh7372: add clock lookup entries for DT-based devices
      ARM: sh7372: fix cache clean / invalidate order
      ARM: shmobile: add function declarations for sh7372 DT helper functions

Kuninori Morimoto (3):
      ARM: shmobile: r8a7740: add TMU timer support
      ARM: shmobile: sh73a0: fixup div4_clks bitmap
      ARM: shmobile: r8a7779: scif .irqs used SCIx_IRQ_MUXED()

Magnus Damm (1):
      ARM: mach-shmobile: sh73a0 external IRQ wake update

Sachin Kamat (1):
      ARM: shmobile: Remove duplicate inclusion of dma-mapping.h in setup-r8a7740.c

Simon Horman (3):
      ARM: mach-shmobile: sh73a0: Allow initialisation of GIC by DT
      ARM: mach-shmobile: sh73a0: Minimal setup using DT
      ARM: mach-shmobile: sh73a0: Initialise MMCIF using DT

 arch/arm/boot/dts/sh73a0-reference.dtsi        |   24 ++++++
 arch/arm/boot/dts/sh73a0.dtsi                  |   93 +++++++++++++++++++++++
 arch/arm/mach-shmobile/Makefile                |    3 +-
 arch/arm/mach-shmobile/board-armadillo800eva.c |    2 +
 arch/arm/mach-shmobile/board-kzm9g.c           |    2 +
 arch/arm/mach-shmobile/clock-r8a7740.c         |    6 +-
 arch/arm/mach-shmobile/clock-sh7372.c          |    9 +++
 arch/arm/mach-shmobile/clock-sh73a0.c          |   35 ++++++---
 arch/arm/mach-shmobile/headsmp-sh73a0.S        |   50 +++++++++++++
 arch/arm/mach-shmobile/include/mach/common.h   |    8 ++
 arch/arm/mach-shmobile/intc-sh73a0.c           |   16 ++--
 arch/arm/mach-shmobile/pm-r8a7740.c            |   22 ++++++
 arch/arm/mach-shmobile/pm-sh73a0.c             |   32 ++++++++
 arch/arm/mach-shmobile/setup-r8a7740.c         |   95 +++++++++++++++++++++++-
 arch/arm/mach-shmobile/setup-r8a7779.c         |   18 ++---
 arch/arm/mach-shmobile/setup-sh73a0.c          |   62 +++++++++++++++-
 arch/arm/mach-shmobile/sleep-sh7372.S          |   12 +--
 arch/arm/mach-shmobile/smp-sh73a0.c            |   66 ++++++++--------
 18 files changed, 485 insertions(+), 70 deletions(-)
 create mode 100644 arch/arm/boot/dts/sh73a0-reference.dtsi
 create mode 100644 arch/arm/boot/dts/sh73a0.dtsi
 create mode 100644 arch/arm/mach-shmobile/headsmp-sh73a0.S
 create mode 100644 arch/arm/mach-shmobile/pm-sh73a0.c
Mark Rutland - Jan. 25, 2013, 10:22 a.m.
On Fri, Jan 25, 2013 at 03:55:30AM +0000, Simon Horman wrote:
> This allows the GIC interrupt controller of the sh73a0 SoC to be
> initialised using a flattened device tree blob.
> 
> It does not allow the INTC interrupt controller which is also present on
> the sh73a0 SoC to be enabled via device tree.  Nor does it handle sharing
> of interrupts between the GIC and INTC interrupt controllers.
> 
> This limits the usefulness of this code to applications which only wish to
> access devices which use interrupts that can be handled by the GIC
> interrupt controller. Other applications should, for now, continue using
> non-device tree initialisation of the sh72a0 interrupt controllers.
> 
> Includes update to use irqchip_init() by Thierry Reding
> 
> Cc: Thierry Reding <thierry.reding@avionic-design.de>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
>  arch/arm/boot/dts/sh73a0.dtsi                |   33 ++++++++++++++++++++++++++
>  arch/arm/mach-shmobile/include/mach/common.h |    1 +
>  arch/arm/mach-shmobile/intc-sh73a0.c         |    9 +++++++
>  3 files changed, 43 insertions(+)
>  create mode 100644 arch/arm/boot/dts/sh73a0.dtsi
> 
> diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
> new file mode 100644
> index 0000000..7dae1f4
> --- /dev/null
> +++ b/arch/arm/boot/dts/sh73a0.dtsi
> @@ -0,0 +1,33 @@
> +/*
> + * Device Tree Source for the SH73A0 SoC
> + *
> + * Copyright (C) 2012 Renesas Solutions Corp.
> + *
> + * This file is licensed under the terms of the GNU General Public License
> + * version 2.  This program is licensed "as is" without any warranty of any
> + * kind, whether express or implied.
> + */
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> +	compatible = "renesas,sh73a0";
> +
> +	cpus {
> +		cpu@0 {
> +			compatible = "arm,cortex-a9";
> +		};
> +		cpu@1 {
> +			compatible = "arm,cortex-a9";
> +		};

I replied to v1, not realising you'd posted a v2:

It would be good to have the reg and device_type properties set here for the
logical map.

[...]

Thanks,
Mark.
Mark Rutland - Jan. 28, 2013, 10:59 a.m.
On Mon, Jan 28, 2013 at 12:48:19AM +0000, Simon Horman wrote:
> On Fri, Jan 25, 2013 at 10:22:10AM +0000, Mark Rutland wrote:
> > On Fri, Jan 25, 2013 at 03:55:30AM +0000, Simon Horman wrote:
> > > This allows the GIC interrupt controller of the sh73a0 SoC to be
> > > initialised using a flattened device tree blob.
> > > 
> > > It does not allow the INTC interrupt controller which is also present on
> > > the sh73a0 SoC to be enabled via device tree.  Nor does it handle sharing
> > > of interrupts between the GIC and INTC interrupt controllers.
> > > 
> > > This limits the usefulness of this code to applications which only wish to
> > > access devices which use interrupts that can be handled by the GIC
> > > interrupt controller. Other applications should, for now, continue using
> > > non-device tree initialisation of the sh72a0 interrupt controllers.
> > > 
> > > Includes update to use irqchip_init() by Thierry Reding
> > > 
> > > Cc: Thierry Reding <thierry.reding@avionic-design.de>
> > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > > ---
> > >  arch/arm/boot/dts/sh73a0.dtsi                |   33 ++++++++++++++++++++++++++
> > >  arch/arm/mach-shmobile/include/mach/common.h |    1 +
> > >  arch/arm/mach-shmobile/intc-sh73a0.c         |    9 +++++++
> > >  3 files changed, 43 insertions(+)
> > >  create mode 100644 arch/arm/boot/dts/sh73a0.dtsi
> > > 
> > > diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
> > > new file mode 100644
> > > index 0000000..7dae1f4
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/sh73a0.dtsi
> > > @@ -0,0 +1,33 @@
> > > +/*
> > > + * Device Tree Source for the SH73A0 SoC
> > > + *
> > > + * Copyright (C) 2012 Renesas Solutions Corp.
> > > + *
> > > + * This file is licensed under the terms of the GNU General Public License
> > > + * version 2.  This program is licensed "as is" without any warranty of any
> > > + * kind, whether express or implied.
> > > + */
> > > +
> > > +/include/ "skeleton.dtsi"
> > > +
> > > +/ {
> > > +	compatible = "renesas,sh73a0";
> > > +
> > > +	cpus {
> > > +		cpu@0 {
> > > +			compatible = "arm,cortex-a9";
> > > +		};
> > > +		cpu@1 {
> > > +			compatible = "arm,cortex-a9";
> > > +		};
> > 
> > I replied to v1, not realising you'd posted a v2:
> > 
> > It would be good to have the reg and device_type properties set here for the
> > logical map.
> 
> Thanks.
> 
> I'd prefer to handle this as an incremental patch to be applied after the
> pull-request in which the patch above appears. The patch below is what
> I have in mind.

Sure. The patch looks right to me :)

> 
> I also believe that the following files seem to be targets for a similar
> change. The latter two are for UP boards, could you comment on if reg
> and device_type are appropriate for them too.
> 
> arch/arm/boot/dts/emev2.dtsi

Yup, this one should have reg and device_type added.

> arch/arm/boot/dts/r8a7740.dtsi
> arch/arm/boot/dts/sh7372.dtsi

I'm not sure what the deal is with v7 UP hardware. For v6 and below, the lack
of an MPIDR means there's nothing to describe. On v7 we should have an MPIDR
with Aff fields at least, so there is something to describe (even if we don't
use this currently). I don't believe this would cause any problems, and it
would make the dts look consistent.

I've Cc'd Lorenzo in case he has any thoughts on the matter.

> 
> 
> From: Simon Horman <horms+renesas@verge.net.au>
> 
> ARM: mach-shmobile: sh73a0:  Add reg and device_type properties to cpus
> 
> Cc: Mark Rutland <mark.rutland@arm.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
> index 721f486..f202298 100644
> --- a/arch/arm/boot/dts/sh73a0.dtsi
> +++ b/arch/arm/boot/dts/sh73a0.dtsi
> @@ -15,10 +15,14 @@
>  
>  	cpus {
>  		cpu@0 {
> +			device_type = "cpu";
>  			compatible = "arm,cortex-a9";
> +			reg = <0>;
>  		};
>  		cpu@1 {
> +			device_type = "cpu";
>  			compatible = "arm,cortex-a9";
> +			reg = <1>;
>  		};
>  	};
>  
> 

Thanks,
Mark.
Simon Horman - Jan. 29, 2013, 12:22 a.m.
On Mon, Jan 28, 2013 at 10:59:33AM +0000, Mark Rutland wrote:
> On Mon, Jan 28, 2013 at 12:48:19AM +0000, Simon Horman wrote:
> > On Fri, Jan 25, 2013 at 10:22:10AM +0000, Mark Rutland wrote:
> > > On Fri, Jan 25, 2013 at 03:55:30AM +0000, Simon Horman wrote:
> > > > This allows the GIC interrupt controller of the sh73a0 SoC to be
> > > > initialised using a flattened device tree blob.
> > > > 
> > > > It does not allow the INTC interrupt controller which is also present on
> > > > the sh73a0 SoC to be enabled via device tree.  Nor does it handle sharing
> > > > of interrupts between the GIC and INTC interrupt controllers.
> > > > 
> > > > This limits the usefulness of this code to applications which only wish to
> > > > access devices which use interrupts that can be handled by the GIC
> > > > interrupt controller. Other applications should, for now, continue using
> > > > non-device tree initialisation of the sh72a0 interrupt controllers.
> > > > 
> > > > Includes update to use irqchip_init() by Thierry Reding
> > > > 
> > > > Cc: Thierry Reding <thierry.reding@avionic-design.de>
> > > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > > > ---
> > > >  arch/arm/boot/dts/sh73a0.dtsi                |   33 ++++++++++++++++++++++++++
> > > >  arch/arm/mach-shmobile/include/mach/common.h |    1 +
> > > >  arch/arm/mach-shmobile/intc-sh73a0.c         |    9 +++++++
> > > >  3 files changed, 43 insertions(+)
> > > >  create mode 100644 arch/arm/boot/dts/sh73a0.dtsi
> > > > 
> > > > diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
> > > > new file mode 100644
> > > > index 0000000..7dae1f4
> > > > --- /dev/null
> > > > +++ b/arch/arm/boot/dts/sh73a0.dtsi
> > > > @@ -0,0 +1,33 @@
> > > > +/*
> > > > + * Device Tree Source for the SH73A0 SoC
> > > > + *
> > > > + * Copyright (C) 2012 Renesas Solutions Corp.
> > > > + *
> > > > + * This file is licensed under the terms of the GNU General Public License
> > > > + * version 2.  This program is licensed "as is" without any warranty of any
> > > > + * kind, whether express or implied.
> > > > + */
> > > > +
> > > > +/include/ "skeleton.dtsi"
> > > > +
> > > > +/ {
> > > > +	compatible = "renesas,sh73a0";
> > > > +
> > > > +	cpus {
> > > > +		cpu@0 {
> > > > +			compatible = "arm,cortex-a9";
> > > > +		};
> > > > +		cpu@1 {
> > > > +			compatible = "arm,cortex-a9";
> > > > +		};
> > > 
> > > I replied to v1, not realising you'd posted a v2:
> > > 
> > > It would be good to have the reg and device_type properties set here for the
> > > logical map.
> > 
> > Thanks.
> > 
> > I'd prefer to handle this as an incremental patch to be applied after the
> > pull-request in which the patch above appears. The patch below is what
> > I have in mind.
> 
> Sure. The patch looks right to me :)
> 
> > 
> > I also believe that the following files seem to be targets for a similar
> > change. The latter two are for UP boards, could you comment on if reg
> > and device_type are appropriate for them too.
> > 
> > arch/arm/boot/dts/emev2.dtsi
> 
> Yup, this one should have reg and device_type added.

Thanks, I'll prepare a patch.

> > arch/arm/boot/dts/r8a7740.dtsi
> > arch/arm/boot/dts/sh7372.dtsi
> 
> I'm not sure what the deal is with v7 UP hardware. For v6 and below, the lack
> of an MPIDR means there's nothing to describe. On v7 we should have an MPIDR
> with Aff fields at least, so there is something to describe (even if we don't
> use this currently). I don't believe this would cause any problems, and it
> would make the dts look consistent.
> 
> I've Cc'd Lorenzo in case he has any thoughts on the matter.

Understood, I'll wait to see if Lorenzo can guide me.
Olof Johansson - Jan. 29, 2013, 5:11 p.m.
On Fri, Jan 25, 2013 at 12:55:18PM +0900, Simon Horman wrote:
> Hi Olof, Hi Arnd,
> 
> please consider the following soc enhancements for 3.9.
> 
> This series is based on a merge of the irqchip/gic-vic-move and
> timer/cleanup branches in the arm-soc tree. There were a number of
> conflicts in this merge, as indicated by the merge commit
> 6265b0f325eed54558b35769aecb1d79423295c7. In each case I took care to
> match the merge made in the arm-soc tree which is evident in the for-next
> branch.
> 
> ----------------------------------------------------------------
> The following changes since commit 6265b0f325eed54558b35769aecb1d79423295c7:
> 
>   Merge remote-tracking branches 'arm-soc/irqchip/gic-vic-move' and 'arm-soc/timer/cleanup' into soc (2013-01-24 17:57:20 +0900)
> 
> are available in the git repository at:
> 
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git soc
> 

Merged, thanks. You had resolved the board_bcm conflict slightly differenlty
(technically better), but to keep it common with what we have, I added back
the extra line of whitespace.

By the way, you should look into starting to use signed tags for your pull
requests, since it gives you a place to give a short description of the branch
(and that description makes it into the commit with 0 work on our behalf :)



-Olof
Simon Horman - Jan. 30, 2013, 2:18 a.m.
On Tue, Jan 29, 2013 at 09:11:38AM -0800, Olof Johansson wrote:
> On Fri, Jan 25, 2013 at 12:55:18PM +0900, Simon Horman wrote:
> > Hi Olof, Hi Arnd,
> > 
> > please consider the following soc enhancements for 3.9.
> > 
> > This series is based on a merge of the irqchip/gic-vic-move and
> > timer/cleanup branches in the arm-soc tree. There were a number of
> > conflicts in this merge, as indicated by the merge commit
> > 6265b0f325eed54558b35769aecb1d79423295c7. In each case I took care to
> > match the merge made in the arm-soc tree which is evident in the for-next
> > branch.
> > 
> > ----------------------------------------------------------------
> > The following changes since commit 6265b0f325eed54558b35769aecb1d79423295c7:
> > 
> >   Merge remote-tracking branches 'arm-soc/irqchip/gic-vic-move' and 'arm-soc/timer/cleanup' into soc (2013-01-24 17:57:20 +0900)
> > 
> > are available in the git repository at:
> > 
> > 
> >   git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git soc
> > 
> 
> Merged, thanks. You had resolved the board_bcm conflict slightly differenlty
> (technically better), but to keep it common with what we have, I added back
> the extra line of whitespace.
> 
> By the way, you should look into starting to use signed tags for your pull
> requests, since it gives you a place to give a short description of the branch
> (and that description makes it into the commit with 0 work on our behalf :)

Sure, will do.

Thanks for this and the other 3 merges.
Simon Horman - Jan. 31, 2013, 6:39 a.m.
On Wed, Jan 30, 2013 at 11:18:02AM +0900, Simon Horman wrote:
> On Tue, Jan 29, 2013 at 09:11:38AM -0800, Olof Johansson wrote:
> > On Fri, Jan 25, 2013 at 12:55:18PM +0900, Simon Horman wrote:
> > > Hi Olof, Hi Arnd,
> > > 
> > > please consider the following soc enhancements for 3.9.
> > > 
> > > This series is based on a merge of the irqchip/gic-vic-move and
> > > timer/cleanup branches in the arm-soc tree. There were a number of
> > > conflicts in this merge, as indicated by the merge commit
> > > 6265b0f325eed54558b35769aecb1d79423295c7. In each case I took care to
> > > match the merge made in the arm-soc tree which is evident in the for-next
> > > branch.
> > > 
> > > ----------------------------------------------------------------
> > > The following changes since commit 6265b0f325eed54558b35769aecb1d79423295c7:
> > > 
> > >   Merge remote-tracking branches 'arm-soc/irqchip/gic-vic-move' and 'arm-soc/timer/cleanup' into soc (2013-01-24 17:57:20 +0900)
> > > 
> > > are available in the git repository at:
> > > 
> > > 
> > >   git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git soc
> > > 
> > 
> > Merged, thanks. You had resolved the board_bcm conflict slightly differenlty
> > (technically better), but to keep it common with what we have, I added back
> > the extra line of whitespace.
> > 
> > By the way, you should look into starting to use signed tags for your pull
> > requests, since it gives you a place to give a short description of the branch
> > (and that description makes it into the commit with 0 work on our behalf :)
> 
> Sure, will do.

I have attempted to do so for two pull requests I sent a little earlier
today. Please let me know if I have missed something.