From patchwork Thu Jan 24 16:48:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 215452 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 879062C00A8 for ; Fri, 25 Jan 2013 03:50:16 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 806A14A12F; Thu, 24 Jan 2013 17:49:40 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id NaSlc2SuHX1p; Thu, 24 Jan 2013 17:49:40 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 73ACD4A135; Thu, 24 Jan 2013 17:48:48 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 55ECC4A104 for ; Thu, 24 Jan 2013 17:48:34 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IDc79-RBh+cr for ; Thu, 24 Jan 2013 17:48:33 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from km20343-01.keymachine.de (ns.km20343-01.keymachine.de [84.19.182.79]) by theia.denx.de (Postfix) with ESMTPS id 369214A0BD for ; Thu, 24 Jan 2013 17:48:28 +0100 (CET) Received: from localhost.localdomain (g231089207.adsl.alicedsl.de [92.231.89.207]) by km20343-01.keymachine.de (Postfix) with ESMTPA id 6B4077D4419; Thu, 24 Jan 2013 17:48:27 +0100 (CET) From: Lucas Stach To: u-boot@lists.denx.de Date: Thu, 24 Jan 2013 17:48:17 +0100 Message-Id: <1359046100-19385-9-git-send-email-dev@lynxeye.de> X-Mailer: git-send-email 1.8.0.2 In-Reply-To: <1359046100-19385-1-git-send-email-dev@lynxeye.de> References: <1359046100-19385-1-git-send-email-dev@lynxeye.de> Cc: Stephen Warren , Tom Warren Subject: [U-Boot] [PATCH 08/11] tegra20: switch over paz00 board to use tablebased pinmux X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Init pinmux in one shot, in order to avoid any conflicts. Signed-off-by: Lucas Stach --- board/compal/paz00/paz00.c | 149 ++++++++++++++++++++++++++++++++++----------- include/configs/paz00.h | 3 + 2 files changed, 115 insertions(+), 37 deletions(-) diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c index 1447f47..b56ba41 100644 --- a/board/compal/paz00/paz00.c +++ b/board/compal/paz00/paz00.c @@ -1,5 +1,6 @@ /* * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013 Lucas Stach * * See file CREDITS for list of people who contributed to this * project. @@ -26,40 +27,11 @@ #ifdef CONFIG_TEGRA_MMC -/* - * Routine: pin_mux_mmc - * Description: setup the pin muxes/tristate values for the SDMMC(s) - */ -static void pin_mux_mmc(void) -{ - /* SDMMC4: config 3, x8 on 2nd set of pins */ - pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); - pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); - pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); - - pinmux_tristate_disable(PINGRP_ATB); - pinmux_tristate_disable(PINGRP_GMA); - pinmux_tristate_disable(PINGRP_GME); - - /* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */ - pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1); - - pinmux_tristate_disable(PINGRP_SDIO1); - - /* For power GPIO PV1 */ - pinmux_tristate_disable(PINGRP_UAC); - /* For CD GPIO PV5 */ - pinmux_tristate_disable(PINGRP_GPV); -} - /* this is a weak define that we are overriding */ int board_mmc_init(bd_t *bd) { debug("board_mmc_init called\n"); - /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - debug("board_mmc_init: init eMMC\n"); /* init dev 0, eMMC chip, with 8-bit bus */ tegra_mmc_init(0, 8, -1, -1); @@ -72,13 +44,116 @@ int board_mmc_init(bd_t *bd) } #endif -#ifdef CONFIG_LCD -/* this is a weak define that we are overriding */ -void pin_mux_display(void) -{ - debug("init display pinmux\n"); +static struct pingroup_config paz00_pinmux[] = { + PINMUX_ENTRY(ATA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATB, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(ATC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATD, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATE, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV1, PLLA_OUT, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV2, PLLP_OUT4, NORMAL, TRISTATE), + PINMUX_ENTRY(CRTP, CRT, NORMAL, TRISTATE), + PINMUX_ENTRY(CSUS, PLLC_OUT1, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP1, DAP1, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP2, GMI, NORMAL, NORMAL), /* GPIO PA4 */ + PINMUX_ENTRY(DAP3, DAP3, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP4, DAP4, NORMAL, TRISTATE), + PINMUX_ENTRY(DDC, I2C2, NORMAL, TRISTATE), + PINMUX_ENTRY(DTA, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTB, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTC, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTD, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTE, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTF, I2C3, NORMAL, TRISTATE), + PINMUX_ENTRY(GMA, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(GMB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GMC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GMD, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GME, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(GPU, PWM, NORMAL, NORMAL), /* GPIO PU4 */ + PINMUX_ENTRY(GPU7, RTCK, NORMAL, NORMAL), /* JTAG RTCK */ + PINMUX_ENTRY(GPV, PCIE, NORMAL, NORMAL), /* GPIO PV5 */ + PINMUX_ENTRY(HDINT, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(I2CP, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(IRRX, UARTA, NORMAL, NORMAL), /* UART A */ + PINMUX_ENTRY(IRTX, UARTA, NORMAL, NORMAL), /* UART A */ + PINMUX_ENTRY(KBCA, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCB, SDIO2, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCC, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCD, SDIO2, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCE, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCF, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(LCSN, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD0, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD1, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD2, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD3, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD4, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD5, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD6, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD7, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD8, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD9, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD10, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD11, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD12, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD13, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD14, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD15, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD16, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD17, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LDC, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LDI, DISPA, NORMAL, NORMAL), /* GPIO PM6 */ + PINMUX_ENTRY(LHP0, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LHP1, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LHP2, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LHS, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LM0, RSVD4, NORMAL, NORMAL), /* GPIO PW0 */ + PINMUX_ENTRY(LM1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPP, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LPW0, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LPW1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW2, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LSC0, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LSC1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSCK, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDA, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSPI, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LVP0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP1, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LVS, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(OWC, OWR, NORMAL, TRISTATE), + PINMUX_ENTRY(PTA, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(RM, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(SDB, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDC, TWC, NORMAL, TRISTATE), + PINMUX_ENTRY(SDD, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDIO1, SDIO1, NORMAL, NORMAL), /* SDIO1 */ + PINMUX_ENTRY(SLXA, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXC, SPI4, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXD, SPI4, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXK, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDI, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDO, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPID, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIE, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIF, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIG, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIH, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(UAA, ULPI, NORMAL, TRISTATE), + PINMUX_ENTRY(UAB, ULPI, NORMAL, TRISTATE), + PINMUX_ENTRY(UAC, RSVD4, NORMAL, NORMAL), /* GPIO PV1 */ + PINMUX_ENTRY(UAD, SPDIF, NORMAL, TRISTATE), + PINMUX_ENTRY(UCA, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UCB, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UDA, ULPI, NORMAL, TRISTATE), +}; - /* EN_VDD_PANEL GPIO A4 */ - pinmux_tristate_disable(PINGRP_DAP2); +void pinmux_init(void) +{ + pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux)); } -#endif diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 2edb4aa..8acd65b 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -20,6 +20,9 @@ #include #include "tegra20-common.h" +/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX + /* Enable fdt support for Paz00. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-paz00 #define CONFIG_OF_CONTROL