From patchwork Thu Jan 24 04:03:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 215235 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0160D2C007C for ; Thu, 24 Jan 2013 16:15:51 +1100 (EST) Received: from localhost ([::1]:35082 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TyFAC-0003Uo-Sf for incoming@patchwork.ozlabs.org; Thu, 24 Jan 2013 00:15:48 -0500 Received: from eggs.gnu.org ([208.118.235.92]:51687) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TyE3K-0002WW-7y for qemu-devel@nongnu.org; Wed, 23 Jan 2013 23:04:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TyE37-0004LS-JS for qemu-devel@nongnu.org; Wed, 23 Jan 2013 23:04:38 -0500 Received: from mail-pb0-f46.google.com ([209.85.160.46]:59957) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TyE37-0004LE-Bg for qemu-devel@nongnu.org; Wed, 23 Jan 2013 23:04:25 -0500 Received: by mail-pb0-f46.google.com with SMTP id wy7so5121542pbc.5 for ; Wed, 23 Jan 2013 20:04:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=aMImP8UxhaL9ZZ7tkoxW8CsXJ6XVHJ9o6mzJAnMxhes=; b=X/6jWj060aO+g5s0xIwsqrm4m06Iz6gDsVv4IUXhohkkpHTGyZbkCw/dvjKX8XSTfk 6qclNxpv+peJZaFFgISKKaPH+amCMVG+PLJGTbw72mmNeMKXbbt0pKz0ovQhWl5s8YSa GS1urIf+52WajQGEQExvDjwhJwpFzH+4jif7+G7wq1nN+khEVuUqCtus7DZmaxOxCthG 0lZ4806om//PXyBxokuS6bUm3IV8oSM/y84+Vfh8VQ85dkoR0wzR3nyhTUQzaEUpkUeZ 3GbRCf/KCT5usRa2kdCUBWghD+c7RbTRh4nVQrNE4+FJuL7Qhz041OEH0k+JPqW06yKZ HYDw== X-Received: by 10.68.236.2 with SMTP id uq2mr1442809pbc.55.1359000264454; Wed, 23 Jan 2013 20:04:24 -0800 (PST) Received: from anchor.twiddle.home (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPS id ot3sm14027480pbb.38.2013.01.23.20.04.22 (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 23 Jan 2013 20:04:23 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 23 Jan 2013 20:03:08 -0800 Message-Id: <1359000221-19834-25-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1359000221-19834-1-git-send-email-rth@twiddle.net> References: <1359000221-19834-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.160.46 Cc: Blue Swirl , Paolo Bonzini Subject: [Qemu-devel] [PATCH 24/57] target-i386: change gen_setcc_slow_T0 to gen_setcc_slow X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Paolo Bonzini Do not hard code the destination register. Reviewed-by: Blue Swirl Signed-off-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target-i386/translate.c | 39 ++++++++++++++++++++------------------- 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 172aad1..85be697 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1038,53 +1038,54 @@ static void gen_compute_eflags_z(DisasContext *s, TCGv reg, bool inv) } } -static inline void gen_setcc_slow_T0(DisasContext *s, int jcc_op, bool inv) +static void gen_setcc_slow(DisasContext *s, int jcc_op, TCGv reg, bool inv) { + assert(!TCGV_EQUAL(reg, cpu_cc_src)); switch(jcc_op) { case JCC_O: - gen_compute_eflags_o(s, cpu_T[0]); + gen_compute_eflags_o(s, reg); break; case JCC_B: - gen_compute_eflags_c(s, cpu_T[0], inv); + gen_compute_eflags_c(s, reg, inv); inv = false; break; case JCC_Z: - gen_compute_eflags_z(s, cpu_T[0], inv); + gen_compute_eflags_z(s, reg, inv); inv = false; break; case JCC_BE: gen_compute_eflags(s); - tcg_gen_shri_tl(cpu_T[0], cpu_cc_src, 6); - tcg_gen_or_tl(cpu_T[0], cpu_T[0], cpu_cc_src); - tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1); + tcg_gen_shri_tl(reg, cpu_cc_src, 6); + tcg_gen_or_tl(reg, reg, cpu_cc_src); + tcg_gen_andi_tl(reg, reg, 1); break; case JCC_S: - gen_compute_eflags_s(s, cpu_T[0], inv); + gen_compute_eflags_s(s, reg, inv); inv = false; break; case JCC_P: - gen_compute_eflags_p(s, cpu_T[0]); + gen_compute_eflags_p(s, reg); break; case JCC_L: gen_compute_eflags(s); - tcg_gen_shri_tl(cpu_T[0], cpu_cc_src, 11); /* CC_O */ + tcg_gen_shri_tl(reg, cpu_cc_src, 11); /* CC_O */ tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 7); /* CC_S */ - tcg_gen_xor_tl(cpu_T[0], cpu_T[0], cpu_tmp0); - tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1); + tcg_gen_xor_tl(reg, reg, cpu_tmp0); + tcg_gen_andi_tl(reg, reg, 1); break; default: case JCC_LE: gen_compute_eflags(s); - tcg_gen_shri_tl(cpu_T[0], cpu_cc_src, 11); /* CC_O */ + tcg_gen_shri_tl(reg, cpu_cc_src, 11); /* CC_O */ tcg_gen_shri_tl(cpu_tmp4, cpu_cc_src, 7); /* CC_S */ tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 6); /* CC_Z */ - tcg_gen_xor_tl(cpu_T[0], cpu_T[0], cpu_tmp4); - tcg_gen_or_tl(cpu_T[0], cpu_T[0], cpu_tmp0); - tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1); + tcg_gen_xor_tl(reg, reg, cpu_tmp4); + tcg_gen_or_tl(reg, reg, cpu_tmp0); + tcg_gen_andi_tl(reg, reg, 1); break; } if (inv) { - tcg_gen_xori_tl(cpu_T[0], cpu_T[0], 1); + tcg_gen_xori_tl(reg, reg, 1); } } @@ -1251,7 +1252,7 @@ static inline void gen_jcc1(DisasContext *s, int b, int l1) break; default: slow_jcc: - gen_setcc_slow_T0(s, jcc_op, false); + gen_setcc_slow(s, jcc_op, cpu_T[0], false); tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_T[0], 0, l1); break; @@ -2504,7 +2505,7 @@ static void gen_setcc(DisasContext *s, int b) worth to */ inv = b & 1; jcc_op = (b >> 1) & 7; - gen_setcc_slow_T0(s, jcc_op, inv); + gen_setcc_slow(s, jcc_op, cpu_T[0], inv); } }