From patchwork Thu Jan 24 04:02:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [07/57] target-i386: move carry computation for inc/dec closer to gen_op_set_cc_op Date: Wed, 23 Jan 2013 18:02:51 -0000 From: Richard Henderson X-Patchwork-Id: 215215 Message-Id: <1359000221-19834-8-git-send-email-rth@twiddle.net> To: qemu-devel@nongnu.org Cc: Blue Swirl , Paolo Bonzini From: Paolo Bonzini This ensures the invariant that cpu_cc_op matches s->cc_op when calling the helpers. The next patches need this because gen_compute_eflags and gen_compute_eflags_c will take care of setting cpu_cc_op. Signed-off-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target-i386/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 84da28f..18b39e9 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1373,6 +1373,7 @@ static void gen_inc(DisasContext *s1, int ot, int d, int c) gen_op_ld_T0_A0(ot + s1->mem_index); if (s1->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s1->cc_op); + gen_compute_eflags_c(cpu_cc_src); if (c > 0) { tcg_gen_addi_tl(cpu_T[0], cpu_T[0], 1); s1->cc_op = CC_OP_INCB + ot; @@ -1384,7 +1385,6 @@ static void gen_inc(DisasContext *s1, int ot, int d, int c) gen_op_mov_reg_T0(ot, d); else gen_op_st_T0_A0(ot + s1->mem_index); - gen_compute_eflags_c(cpu_cc_src); tcg_gen_mov_tl(cpu_cc_dst, cpu_T[0]); }