From patchwork Thu Jan 24 04:03:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 215207 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B7BA42C0079 for ; Thu, 24 Jan 2013 15:26:24 +1100 (EST) Received: from localhost ([::1]:56923 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TyEOM-0007mi-Qp for incoming@patchwork.ozlabs.org; Wed, 23 Jan 2013 23:26:22 -0500 Received: from eggs.gnu.org ([208.118.235.92]:55628) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TyEOD-0007mB-1N for qemu-devel@nongnu.org; Wed, 23 Jan 2013 23:26:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TyE3i-0004WF-61 for qemu-devel@nongnu.org; Wed, 23 Jan 2013 23:05:10 -0500 Received: from mail-pa0-f43.google.com ([209.85.220.43]:64496) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TyE3h-0004Uh-Sm for qemu-devel@nongnu.org; Wed, 23 Jan 2013 23:05:02 -0500 Received: by mail-pa0-f43.google.com with SMTP id fb10so5217201pad.2 for ; Wed, 23 Jan 2013 20:05:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=mhSN+OzF4C7QYKzs4kUjdSCHoI6VpkAzRDsMPJRwYQY=; b=vj/eMITBxPoIeRmz3RocmwpJZu28rIGLOThGjA4pRRhUDN+M1iyajJvXl+x0Xeflpp KVVwNrDl+xflcetHI/A0slwvVJFg+/chzTy91EOF7xRB7Bb0y1z9HPZa4tR/BZ7E4Xdt 2GBZJzG7ahlF8t4SXdV+6/ctocj/f4vnSnam+cr7Sczr67Oxdh74Ow1Z7SRDqemH0YGh R4iJmnFFjTLwEIvEmwgWly7Gkrbl151earEXFaNpsmiCxIP41c1rlxnTDKFDYBYSFc2Q faAglvAyKqQdsTI5rtSivvgX7v1sFQxKJKsXuiWQw0AfQfXPt6CBE4/KaczcEXE7Fugx w85w== X-Received: by 10.66.88.6 with SMTP id bc6mr1512943pab.5.1359000300980; Wed, 23 Jan 2013 20:05:00 -0800 (PST) Received: from anchor.twiddle.home (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPS id ot3sm14027480pbb.38.2013.01.23.20.04.59 (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 23 Jan 2013 20:05:00 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 23 Jan 2013 20:03:30 -0800 Message-Id: <1359000221-19834-47-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1359000221-19834-1-git-send-email-rth@twiddle.net> References: <1359000221-19834-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.220.43 Cc: Blue Swirl , Paolo Bonzini Subject: [Qemu-devel] [PATCH 46/57] target-i386: Implement ANDN X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org As this is the first of the BMI insns to be implemented, this carries quite a bit more baggage than normal. Signed-off-by: Richard Henderson --- target-i386/cpu.c | 10 +++++----- target-i386/translate.c | 19 +++++++++++++++++-- 2 files changed, 22 insertions(+), 7 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 776b670..30893b6 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -399,12 +399,12 @@ typedef struct x86_def_t { #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \ CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A) #define TCG_SVM_FEATURES 0 -#define TCG_7_0_EBX_FEATURES (CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_SMAP) +#define TCG_7_0_EBX_FEATURES (CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_SMAP \ + CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_BMI2) /* missing: - CPUID_7_0_EBX_FSGSBASE, CPUID_7_0_EBX_BMI1, CPUID_7_0_EBX_HLE, - CPUID_7_0_EBX_AVX2, CPUID_7_0_EBX_BMI2, CPUID_7_0_EBX_ERMS, - CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM, CPUID_7_0_EBX_RDSEED, - CPUID_7_0_EBX_ADX */ + CPUID_7_0_EBX_FSGSBASE, CPUID_7_0_EBX_HLE, CPUID_7_0_EBX_AVX2, + CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM, + CPUID_7_0_EBX_RDSEED, CPUID_7_0_EBX_ADX */ /* maintains list of cpu model definitions */ diff --git a/target-i386/translate.c b/target-i386/translate.c index cee6095..8e75cba 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -2960,8 +2960,9 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = { [0xc6] = { (SSEFunc_0_epp)gen_helper_shufps, (SSEFunc_0_epp)gen_helper_shufpd }, /* XXX: casts */ - [0x38] = { SSE_SPECIAL, SSE_SPECIAL, NULL, SSE_SPECIAL }, /* SSSE3/SSE4 */ - [0x3a] = { SSE_SPECIAL, SSE_SPECIAL }, /* SSSE3/SSE4 */ + /* SSSE3, SSE4, MOVBE, CRC32, BMI1, BMI2, ADX. */ + [0x38] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, + [0x3a] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* MMX ops and their SSE extensions */ [0x60] = MMX_OP2(punpcklbw), @@ -4016,6 +4017,20 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, } break; + case 0x0f2: /* andn Gy, By, Ey */ + if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_BMI1) + || !(s->prefix & PREFIX_VEX) + || s->vex_l != 0) { + goto illegal_op; + } + ot = s->dflag == 2 ? OT_QUAD : OT_LONG; + gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); + tcg_gen_andc_tl(cpu_T[0], cpu_regs[s->vex_v], cpu_T[0]); + gen_op_mov_reg_T0(ot, reg); + gen_op_update1_cc(); + set_cc_op(s, CC_OP_LOGICB + ot); + break; + default: goto illegal_op; }