From patchwork Thu Jan 24 04:03:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 215206 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0839F2C0082 for ; Thu, 24 Jan 2013 15:24:50 +1100 (EST) Received: from localhost ([::1]:55328 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TyEMq-0006o7-52 for incoming@patchwork.ozlabs.org; Wed, 23 Jan 2013 23:24:48 -0500 Received: from eggs.gnu.org ([208.118.235.92]:55389) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TyEMh-0006nj-3q for qemu-devel@nongnu.org; Wed, 23 Jan 2013 23:24:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TyE3l-0004bP-NZ for qemu-devel@nongnu.org; Wed, 23 Jan 2013 23:05:13 -0500 Received: from mail-da0-f44.google.com ([209.85.210.44]:55369) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TyE3l-0004Z9-AQ for qemu-devel@nongnu.org; Wed, 23 Jan 2013 23:05:05 -0500 Received: by mail-da0-f44.google.com with SMTP id z20so4028985dae.3 for ; Wed, 23 Jan 2013 20:05:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=HEZxf8k8VA3e85jjgC34wfWPo/rUNsrEr5+NBwzWe08=; b=NInFuKZCj52qCgTqdz3xpqivjQZt3I9O4YoTGdulEZLmxC0vs1eSB0SqfWeUHtB5ph jtVInllMhJZVQCJsaPGdANkyvT0kuIL5AL0/b8b+XiOe/G0CFXYF22dMDpLCIg+GWmz7 K7CctS4wzOSK7jtAizieMI2X6Hg3qU3rEltEY6Kr76mq4BdNkK7tmTDPE9oBu9vaPMvI ZvO8WSi8Pf66PDExsFOTKDRLihBtRb4w5p5q9CiXTteRUK9jGTPTr1/saS2ZFzMaQUPy DUt+VENPn6RFMPH+EbHf+YKehtlea7fHteiVEc6+xCNXh2QmGm2CGQ+sih0k9RR/F9WP hZBA== X-Received: by 10.68.130.161 with SMTP id of1mr1526920pbb.32.1359000304221; Wed, 23 Jan 2013 20:05:04 -0800 (PST) Received: from anchor.twiddle.home (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPS id ot3sm14027480pbb.38.2013.01.23.20.05.02 (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 23 Jan 2013 20:05:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 23 Jan 2013 20:03:32 -0800 Message-Id: <1359000221-19834-49-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1359000221-19834-1-git-send-email-rth@twiddle.net> References: <1359000221-19834-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.210.44 Cc: Blue Swirl , Paolo Bonzini Subject: [Qemu-devel] [PATCH 48/57] target-i386: Implement BLSR, BLSMSK, BLSI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Do all of group 17 at one time for ease. Signed-off-by: Richard Henderson --- target-i386/cc_helper.c | 9 +++++++++ target-i386/cc_helper_template.h | 14 ++++++++++++++ target-i386/cpu.h | 5 +++++ target-i386/helper.c | 7 ++++++- target-i386/translate.c | 42 ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 76 insertions(+), 1 deletion(-) diff --git a/target-i386/cc_helper.c b/target-i386/cc_helper.c index b209b57..b5eb11a 100644 --- a/target-i386/cc_helper.c +++ b/target-i386/cc_helper.c @@ -155,6 +155,13 @@ target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1, case CC_OP_SARL: return compute_all_sarl(dst, src1, src2); + case CC_OP_BMILGB: + return compute_all_bmilgb(dst, src1, src2); + case CC_OP_BMILGW: + return compute_all_bmilgw(dst, src1, src2); + case CC_OP_BMILGL: + return compute_all_bmilgl(dst, src1, src2); + #ifdef TARGET_X86_64 case CC_OP_MULQ: return compute_all_mulq(dst, src1, src2); @@ -176,6 +183,8 @@ target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1, return compute_all_shlq(dst, src1, src2); case CC_OP_SARQ: return compute_all_sarq(dst, src1, src2); + case CC_OP_BMILGQ: + return compute_all_bmilgq(dst, src1, src2); #endif } } diff --git a/target-i386/cc_helper_template.h b/target-i386/cc_helper_template.h index 5cfd232..1df6419 100644 --- a/target-i386/cc_helper_template.h +++ b/target-i386/cc_helper_template.h @@ -198,6 +198,20 @@ static int glue(compute_all_mul, SUFFIX)(DATA_TYPE dst, DATA_TYPE src1, return cf | pf | af | zf | sf | of; } +static int glue(compute_all_bmilg, SUFFIX)(DATA_TYPE dst, DATA_TYPE src1, + DATA_TYPE src2) +{ + int cf, pf, af, zf, sf, of; + + cf = (src1 != 0); + pf = 0; /* undefined */ + af = 0; /* undefined */ + zf = (dst == 0) * CC_Z; + sf = lshift(dst, 8 - DATA_BITS) & CC_S; + of = 0; + return cf | pf | af | zf | sf | of; +} + #undef DATA_BITS #undef SIGN_MASK #undef DATA_TYPE diff --git a/target-i386/cpu.h b/target-i386/cpu.h index fa34ff2..6153189 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -636,6 +636,11 @@ typedef enum { CC_OP_SARL, CC_OP_SARQ, + CC_OP_BMILGB, /* Z,S via CC_DST, C = SRC==0; O=0; P,A undefined */ + CC_OP_BMILGW, + CC_OP_BMILGL, + CC_OP_BMILGQ, + CC_OP_NB, } CCOp; diff --git a/target-i386/helper.c b/target-i386/helper.c index 547c25e..5163472 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -55,7 +55,7 @@ int cpu_x86_support_mca_broadcast(CPUX86State *env) /***********************************************************/ /* x86 debug */ -static const char *cc_op_str[] = { +static const char *cc_op_str[CC_OP_NB] = { "DYNAMIC", "EFLAGS", @@ -108,6 +108,11 @@ static const char *cc_op_str[] = { "SARW", "SARL", "SARQ", + + "BMILGB", + "BMILGW", + "BMILGL", + "BMILGQ", }; static void diff --git a/target-i386/translate.c b/target-i386/translate.c index bb9cdcf..d68537c 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -207,6 +207,7 @@ static const uint8_t cc_op_live[CC_OP_NB] = { [CC_OP_DECB ... CC_OP_DECQ] = USES_CC_DST | USES_CC_SRC, [CC_OP_SHLB ... CC_OP_SHLQ] = USES_CC_DST | USES_CC_SRC, [CC_OP_SARB ... CC_OP_SARQ] = USES_CC_DST | USES_CC_SRC, + [CC_OP_BMILGB ... CC_OP_BMILGQ] = USES_CC_DST | USES_CC_SRC, }; /* Bit set if the global variable is live, but merely an optimization @@ -4071,6 +4072,47 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, } break; + case 0x0f3: + case 0x1f3: + case 0x2f3: + case 0x3f3: /* Group 17 */ + if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_BMI1) + || !(s->prefix & PREFIX_VEX) + || s->vex_l != 0) { + goto illegal_op; + } + ot = s->dflag == 2 ? OT_QUAD : OT_LONG; + gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); + + switch (reg & 7) { + case 1: /* blsr By,Ey */ + tcg_gen_neg_tl(cpu_T[1], cpu_T[0]); + tcg_gen_and_tl(cpu_T[0], cpu_T[0], cpu_T[1]); + gen_op_mov_reg_T0(ot, s->vex_v); + gen_op_update2_cc(); + set_cc_op(s, CC_OP_BMILGB + ot); + break; + + case 2: /* blsmsk By,Ey */ + tcg_gen_mov_tl(cpu_cc_src, cpu_T[0]); + tcg_gen_subi_tl(cpu_T[0], cpu_T[0], 1); + tcg_gen_xor_tl(cpu_T[0], cpu_T[0], cpu_cc_src); + tcg_gen_mov_tl(cpu_cc_dst, cpu_T[0]); + set_cc_op(s, CC_OP_BMILGB + ot); + break; + + case 3: /* blsi By, Ey */ + tcg_gen_mov_tl(cpu_cc_src, cpu_T[0]); + tcg_gen_subi_tl(cpu_T[0], cpu_T[0], 1); + tcg_gen_and_tl(cpu_T[0], cpu_T[0], cpu_cc_src); + tcg_gen_mov_tl(cpu_cc_dst, cpu_T[0]); + set_cc_op(s, CC_OP_BMILGB + ot); + break; + + default: + goto illegal_op; + } + default: goto illegal_op; }