@@ -2227,6 +2227,22 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
This sorting is done to get a device
order compatible with older (<= 2.4) kernels.
nobfsort Don't sort PCI devices into breadth-first order.
+ pcie_bus_tune_off Disable PCIe MPS (Max Payload Size)
+ turning and using the BIOS-configured MPS defaults.
+ pcie_bus_safe Use the smallest common denominator MPS
+ of the entire tree below a root complex for every
+ device on that fabric. Can avoid inconsistent MPS
+ problem caused by hotplug.
+ pcie_bus_perf Configure pcie device MPS to the largest
+ allowable MPS based on its parent bus. Also set
+ MRRS (Max Read Request Size) to the largest supported
+ value (no larger than the MPS that the device or bus
+ can support) for Max performance.
+ pcie_bus_peer2peer Make the system-wide MPS the smallest
+ possible value (128B). This configuration could prevent
+ peer to peer DMA transmission from working by having
+ the MPS on one root port different than the MPS on
cbiosize=nn[KMG] The fixed amount of bus space which is
reserved for the CardBus bridge's IO window.
The default value is 256 bytes.