From patchwork Wed Jan 23 14:51:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Angelo Dureghello X-Patchwork-Id: 214977 X-Patchwork-Delegate: jason.jin@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id BF0892C007E for ; Thu, 24 Jan 2013 01:51:18 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 271954A0EF; Wed, 23 Jan 2013 15:51:16 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bUQpsY74ihz3; Wed, 23 Jan 2013 15:51:15 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D9D314A0F9; Wed, 23 Jan 2013 15:51:12 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2341D4A0F9 for ; Wed, 23 Jan 2013 15:51:11 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id R08fyY48-2Lj for ; Wed, 23 Jan 2013 15:51:09 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-wi0-f174.google.com (mail-wi0-f174.google.com [209.85.212.174]) by theia.denx.de (Postfix) with ESMTPS id 847944A0EF for ; Wed, 23 Jan 2013 15:51:07 +0100 (CET) Received: by mail-wi0-f174.google.com with SMTP id hq4so785818wib.1 for ; Wed, 23 Jan 2013 06:51:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:date:from:to:cc:subject:message-id:mime-version :content-type:content-disposition:user-agent; bh=mM5WcLAsB9j5gpSxmkcopOJtNUFRWJ2wEsQ0m+ASzDo=; b=To8C+UHwNbz2VW/c4LAL2jB7dKMKZ9+8JbK9jjEtdMHcaP57ExXVEuy/M5kaFF3pj2 1OIWvsLefe2zXdU4li9FfvyYszXyMq4Ta5ucGXmrFoXsVyp8MNMlZduEg/usxBMlekTF Ls5rd9kTsi9QnZW/K6OWACasPev+pd3EMZVESO+qYQQTjFqQqccySHGW+hzXb8bU0I9a IW9H15XksjMcFLsiGOWzxs+hMA82FV1F/2BpkCGdTCtsloHx9vOVP1yIa+GorsE3bfxQ zlpQb5CXX0Zjlz2k/oPIwEwHECJK10QrdppBw+8qw7TUF8Fr57iDhC4rozwlBCkOlwDr 0uiw== X-Received: by 10.194.78.162 with SMTP id c2mr3093488wjx.46.1358952667627; Wed, 23 Jan 2013 06:51:07 -0800 (PST) Received: from sion.sysam (host212-171-dynamic.56-82-r.retail.telecomitalia.it. [82.56.171.212]) by mx.google.com with ESMTPS id i2sm27127492wiw.3.2013.01.23.06.51.05 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 23 Jan 2013 06:51:06 -0800 (PST) Date: Wed, 23 Jan 2013 15:51:07 +0100 From: Angelo Dureghello To: u-boot@lists.denx.de Message-ID: <20130123145107.GA5565@sion.sysam> MIME-Version: 1.0 Content-Disposition: attachment; filename="patch2.txt" User-Agent: Mutt/1.5.21 (2010-09-15) Subject: [U-Boot] [PATCH v4 2/2] board: add support for amcore board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add support for Sysam AMCORE mcf5307 (coldfire) based board. Signed-off-by: Angelo Dureghello Cc: Jason Jin --- Changes for v2: - None Changes for v3: - Fix code format issues Changes for v4: - Added MAINTAINERS file entry - Removed all unnecessary blank lines - Added get_ram_size in sdram init - Reused already existing sdram test routine - Removed custom flash.c, used std mtd/CFI driver --- MAINTAINERS | 4 + board/sysam/amcore/Makefile | 43 ++++++ board/sysam/amcore/amcore.c | 160 +++++++++++++++++++++ board/sysam/amcore/config.mk | 23 +++ board/sysam/amcore/u-boot.lds | 101 ++++++++++++++ boards.cfg | 1 + include/configs/amcore.h | 220 +++++++++++++++++++++++++++++ 7 files changed, 552 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 28c052d..1d27cb7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1137,6 +1137,10 @@ Wolfgang Wegner astro_mcf5373l MCF5373L +Angelo Dureghello + + amcore mcf5307 + ######################################################################### # AVR32 Systems: # # # diff --git a/board/sysam/amcore/Makefile b/board/sysam/amcore/Makefile new file mode 100644 index 0000000..1fd25a8 --- /dev/null +++ b/board/sysam/amcore/Makefile @@ -0,0 +1,43 @@ +# +# Copyright (c) 2011 Angelo Dureghello +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS = $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c new file mode 100644 index 0000000..d40297e --- /dev/null +++ b/board/sysam/amcore/amcore.c @@ -0,0 +1,159 @@ +/* + * Copyright (c) 2012 Angelo Dureghello + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Copy memory testdram() from sandburst/common/sb_common.c + */ + +#include +#include +#include + +void init_lcd(void) +{ + /* + * board can have a K0108 lcd connected on the parallel port, + * wired as below: + * + * fc cpu P0 P1 P2 P3 P4 P5 P6 P7 P10 P11 P12 P13 P14 + * lcd D0 D1 D2 D3 D4 D5 D6 D7 CS1 CS2 RW DI E + * + * Starting up setting lines in high impedance + */ + sim_t *sim = (sim_t *)(MMAP_SIM); + + out_be16(&sim->par, 0x300); + + gpio_t *gpio = (gpio_t *)(MMAP_GPIO); + + out_be16(&gpio->paddr, 0xfcff); + out_be16(&gpio->padat, 0x0c00); +} + +int checkboard(void) +{ + puts("Board: "); + puts("AMCORE v.001(alpha)\n"); + + init_lcd(); + + return 0; +} + +/* + * in initdram we are here executing from flash + * case 1: + * is with no ACR/flash cache enabled + * nop = 40ns (scope measured) + */ +void fudelay(int usec) +{ + while (usec--) + asm volatile ("nop"); +} + +phys_size_t initdram(int board_type) +{ + u32 dramsize, RC; + + dramctrl_t *dc = (dramctrl_t *)(MMAP_DRAMC); + + /* + * SDRAM MT48LC4M32B2 details + * Memory block 0: 16 MB of SDRAM at address $00000000 + * Port size: 32-bit port + * + * Memory block 0 wired as follows: + * CPU : A15 A14 A13 A12 A11 A10 A9 A17 A18 A19 A20 A21 A22 A23 + * SDRAM : A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 BA0 BA1 + * + * Ensure that there is a delay of at least 100 microseconds from + * processor reset to the following code so that the SDRAM is ready + * for commands. + */ + fudelay(100); + + /* + * DCR + * set proper RC as per specification + */ + RC = (CONFIG_SYS_CPU_CLK / 1000000) >> 1; + RC = (RC * 15) >> 4; + + /* 0x8000 is the faster option */ + out_be16(&dc->dcr, 0x8200 | RC); + + /* + * DACR0, page mode continuous, CMD on A20 0x0300 + */ + out_be32(&dc->dacr0, 0x00003304); + + dramsize = ((CONFIG_SYS_SDRAM_SIZE << 20)-1) & 0xfffc0000; + out_be32(&dc->dmr0, dramsize|1); + + /* issue a PRECHARGE ALL */ + out_be32(&dc->dacr0, 0x0000330c); + out_be32(0x00000004, 0xbeaddeed); + /* issue AUTOREFRESH */ + out_be32(&dc->dacr0, 0x0000b304); + /* let refresh occour */ + fudelay(1); + + out_be32(&dc->dacr0, 0x0000b344); + out_be32(0x00000c00, 0xbeaddeed); + + return get_ram_size(CONFIG_SYS_SDRAM_BASE, + (CONFIG_SYS_SDRAM_SIZE<<20)); +} + +#if defined(CONFIG_SYS_DRAM_TEST) +/* memory test */ +int testdram(void) +{ + uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START; + uint *pend = (uint *) CONFIG_SYS_MEMTEST_END; + uint *p; + + printf("Testing SDRAM: "); + for (p = pstart; p < pend; p++) + *p = 0xaaaaaaaa; + + for (p = pstart; p < pend; p++) { + if (*p != 0xaaaaaaaa) { + printf("SDRAM test fails at: %08x\n", (uint) p); + return 1; + } + } + + for (p = pstart; p < pend; p++) + *p = 0x55555555; + + for (p = pstart; p < pend; p++) { + if (*p != 0x55555555) { + printf("SDRAM test fails at: %08x\n", (uint) p); + return 1; + } + } + + printf("OK\n"); + + return 0; +} +#endif diff --git a/board/sysam/amcore/config.mk b/board/sysam/amcore/config.mk new file mode 100644 index 0000000..cb45c2c --- /dev/null +++ b/board/sysam/amcore/config.mk @@ -0,0 +1,23 @@ +# +# Copyright (c) 2011 Angelo Dureghello +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CONFIG_SYS_TEXT_BASE = 0xffc00000 diff --git a/board/sysam/amcore/u-boot.lds b/board/sysam/amcore/u-boot.lds new file mode 100644 index 0000000..ccb770d --- /dev/null +++ b/board/sysam/amcore/u-boot.lds @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2011 Angelo Dureghello + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(m68k) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + .text : + { + arch/m68k/cpu/mcf530x/start.o (.text) + + . = DEFINED(env_offset) ? env_offset : .; + common/env_embedded.o (.text) + + *(.text) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + + .reloc : + { + __got_start = .; + KEEP(*(.got)) + __got_end = .; + _GOT2_TABLE_ = .; + KEEP(*(.got2)) + _FIXUP_TABLE_ = .; + KEEP(*(.fixup)) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.sdata) + } + _edata = .; + PROVIDE (edata = .); + + . = .; + + . = ALIGN(4); + .u_boot_list : { + #include + } + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + _sbss = .; + *(.sbss*) + *(.bss*) + *(COMMON) + . = ALIGN(4); + _ebss = .; + } + __bss_end__ = . ; + PROVIDE (end = .); +} diff --git a/boards.cfg b/boards.cfg index e4b0d44..6e9b952 100644 --- a/boards.cfg +++ b/boards.cfg @@ -388,6 +388,7 @@ M5271EVB m68k mcf52x2 m5271evb freesca M5272C3 m68k mcf52x2 m5272c3 freescale M5275EVB m68k mcf52x2 m5275evb freescale M5282EVB m68k mcf52x2 m5282evb freescale +amcore m68k mcf530x amcore sysam astro_mcf5373l m68k mcf532x mcf5373l astro M53017EVB m68k mcf532x m53017evb freescale M5329AFEE m68k mcf532x m5329evb freescale - M5329EVB:NANDFLASH_SIZE=0 diff --git a/include/configs/amcore.h b/include/configs/amcore.h new file mode 100644 index 0000000..c8545f8 --- /dev/null +++ b/include/configs/amcore.h @@ -0,0 +1,220 @@ +/* + * Configuation settings for the Sysam AMCORE board. + * + * Copyright (c) 2012 Angelo Dureghello + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef _AMCORE_H +#define _AMCORE_H + +/* + * AMCORE flash memory map + * + * As per CONFIG_SYS_SST_SECTSZ, amcore SST39VF3201B flash + * is organized into 1024 x 4K small secotrs (total 4MB). + * + * 0xffc00000 flash start + * 0xffc00000 u-boot code (128-4kB) + * 0xffc1f000 u-boot env (4kB) + * ----------------------------------------- + * 0xffc20000 to + * 0xffffffff reserved for os usage + */ + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_MCF530x /* define processor family */ +#define CONFIG_M5307 /* define processor type */ + +#define CONFIG_MCFTMR +#define CONFIG_MCFUART +#define CONFIG_SYS_UART_PORT 0 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , \ + 57600, 115200 } + +/* autoboot delay in seconds */ +#define CONFIG_BOOTDELAY 1 +/* autoboot command */ +#define CONFIG_BOOTCOMMAND "bootm ffc20000" + +/* + * BOOTP options + */ +#undef CONFIG_BOOTP_BOOTFILESIZE +#undef CONFIG_BOOTP_BOOTPATH +#undef CONFIG_BOOTP_GATEWAY +#undef CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ + +#include +#undef CONFIG_CMD_CACHE +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_TIMER +#define CONFIG_CMD_DIAG + +#define CONFIG_SYS_PROMPT "amcore$ " +#undef CONFIG_SYS_LONGHELP /* undef to save memory */ + +#if defined(CONFIG_CMD_KGDB) +/* Console I/O buff. size */ +#define CONFIG_SYS_CBSIZE 1024 +#else +#define CONFIG_SYS_CBSIZE 256 +#endif +/* Print buffer size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT)+16) +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 +/* Boot argument buffer size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* no console @ startup */ +#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ +#define CONFIG_LOOPW 1 /* enable loopw command */ +#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */ + +#define CONFIG_SYS_LOAD_ADDR 0x20000 /* default load address */ + +#undef CONFIG_SYS_DRAM_TEST /* default undef */ +#define CONFIG_SYS_MEMTEST_START 0x0 +#define CONFIG_SYS_MEMTEST_END 0x1000000 + +#define CONFIG_SYS_HZ 1000 + +/* + * Clock configuration: enable only one of the following options + */ + +/* bypass PLL for test purpose */ +#undef CONFIG_SYS_PLL_BYPASS +/* MCF5307 cpu run at 90MHz, set as bus clock x 2 */ +#define CONFIG_SYS_CLK 45000000 +#define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 2) + +/* + * Low Level Configuration Settings + * (address mappings, register initial values, etc.) + * You should know what you are doing if you make changes here. + */ +#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ + +/* + * Definitions for initial stack pointer and data area (in DPRAM) + */ +#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* size of used SRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +/* + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_SIZE 16 /* in MB */ +#define CONFIG_SYS_FLASH_BASE 0xffc00000 +#define CONFIG_SYS_TEXT_BASE 0xffc00000 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 1024 +#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 + +/* + * CFI FLASH driver setup + */ +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +/* amcore design has flash data bytes wired swapped */ +#define CONFIG_SYS_WRITE_SWAPPED_DATA + +/* reserve 128-4KB */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) +#define CONFIG_SYS_MONITOR_LEN ((128-4)*1024) +#define CONFIG_SYS_MALLOC_LEN (1*1024*1024) +#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024) + +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SIZE 0x1000 /* Size of env. data */ +#define CONFIG_ENV_SECT_SIZE 0x1000 /* see README */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_SIZE << 20) + +/* + * Cache Configuration + * + * Special 8K version 3 core cache. + * This is a single unified instruction/data cache. + * sdram - single region - no masks + */ +#define CONFIG_SYS_CACHELINE_SIZE 16 + +#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 4) +#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) +#define CONFIG_SYS_CACHE_ACR0 (CF_ACR_CM_WT | CF_ACR_SM_ALL | \ + CF_ACR_EN) +#define CONFIG_SYS_CACHE_ICACR (CF_CACR_DCM_P | CF_CACR_ESB | \ + CF_CACR_EC) + +/* + * Memory bank definitions + */ + +/* CS0 - AMD Flash, address 0xffc00000 */ +#define CONFIG_SYS_CS0_BASE (CONFIG_SYS_FLASH_BASE>>16) +/* 4MB, AA=0,V=1 C/I BIT for errata */ +#define CONFIG_SYS_CS0_MASK 0x003f0001 +/* WS=10, AA=1, PS=16bit (10) */ +#define CONFIG_SYS_CS0_CTRL 0x1980 + + +/* CS1 - DM9000 Ethernet Controller, address 0x30000000 */ +#define CONFIG_SYS_CS1_BASE 0x3000 +#define CONFIG_SYS_CS1_MASK 0x00070001 +#define CONFIG_SYS_CS1_CTRL 0x0100 + +#endif /*_AMCORE_H*/