Patchwork [Update] PCI: Document PCIE BUS MPS parameters

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Submitter Yijing Wang
Date Jan. 23, 2013, 12:28 p.m.
Message ID <1358944092-28884-1-git-send-email-wangyijing@huawei.com>
Download mbox | patch
Permalink /patch/214919/
State Superseded
Headers show

Comments

Yijing Wang - Jan. 23, 2013, 12:28 p.m.
Document PCIE BUS MPS parameters pcie_bus_tune_off, pcie_bus_safe,
pcie_bus_peer2peer, pcie_bus_perf into Documentation/kernel-parameters.txt.
These parameters were introduced by Jon Mason <mason@myri.com> at
commit 5f39e6705 and commit b03e7495a8. Document these into
kernel-parameters.txt can help users to understand and use the parameters.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 Documentation/kernel-parameters.txt |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)
Randy Dunlap - Jan. 23, 2013, 11:39 p.m.
On 01/23/13 04:28, Yijing Wang wrote:
> Document PCIE BUS MPS parameters pcie_bus_tune_off, pcie_bus_safe,
> pcie_bus_peer2peer, pcie_bus_perf into Documentation/kernel-parameters.txt.
> These parameters were introduced by Jon Mason <mason@myri.com> at
> commit 5f39e6705 and commit b03e7495a8. Document these into
> kernel-parameters.txt can help users to understand and use the parameters.
> 
> Signed-off-by: Yijing Wang <wangyijing@huawei.com>
> ---
>  Documentation/kernel-parameters.txt |   15 +++++++++++++++
>  1 files changed, 15 insertions(+), 0 deletions(-)
> 
> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
> index 363e348..1fb269b 100644
> --- a/Documentation/kernel-parameters.txt
> +++ b/Documentation/kernel-parameters.txt
> @@ -2227,6 +2227,21 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
>  				This sorting is done to get a device
>  				order compatible with older (<= 2.4) kernels.
>  		nobfsort	Don't sort PCI devices into breadth-first order.
> +		pcie_bus_tune_off	Disable PCI-E MPS turning and using
> +				the BIOS configured MPS defaults.

				    BIOS-configured

> +		pcie_bus_safe	Use the smallest common denominator MPS
> +				of the entire tree below a root complex for every device
> +				on that fabric. Can avoid inconsistent mps problem caused

s/mps/MPS/
i.e., use "MPS" consistently.

> +				by hotplug.
> +		pcie_bus_perf	Configure pcie device MPS to the largest allowable
> +				MPS based on its parent bus. And also set MRRS to the

"And also" is redundant.  Just say Also.

What is (are) MRRS?

> +				largest supported value but cannot be configured larger
> +				than the MPS the device or the bus can support for Max
> +				performance.
> +		pcie_bus_peer2peer	Make the system wide MPS the smallest

					         system-wide

> +				possible value (128B).This configuration could prevent it

				                      ^ Space before "This"

> +				from working by having the MPS on one root port different
> +				than the MPS on another.
>  		cbiosize=nn[KMG]	The fixed amount of bus space which is
>  				reserved for the CardBus bridge's IO window.
>  				The default value is 256 bytes.
>
Yijing Wang - Jan. 24, 2013, 1:55 a.m.
Hi Randy,
   Thanks for your review and comments! please refer to inlined comments below.

On 2013/1/24 7:39, Randy Dunlap wrote:
> On 01/23/13 04:28, Yijing Wang wrote:
>> Document PCIE BUS MPS parameters pcie_bus_tune_off, pcie_bus_safe,
>> pcie_bus_peer2peer, pcie_bus_perf into Documentation/kernel-parameters.txt.
>> These parameters were introduced by Jon Mason <mason@myri.com> at
>> commit 5f39e6705 and commit b03e7495a8. Document these into
>> kernel-parameters.txt can help users to understand and use the parameters.
>>
>> Signed-off-by: Yijing Wang <wangyijing@huawei.com>
>> ---
>>  Documentation/kernel-parameters.txt |   15 +++++++++++++++
>>  1 files changed, 15 insertions(+), 0 deletions(-)
>>
>> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
>> index 363e348..1fb269b 100644
>> --- a/Documentation/kernel-parameters.txt
>> +++ b/Documentation/kernel-parameters.txt
>> @@ -2227,6 +2227,21 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
>>  				This sorting is done to get a device
>>  				order compatible with older (<= 2.4) kernels.
>>  		nobfsort	Don't sort PCI devices into breadth-first order.
>> +		pcie_bus_tune_off	Disable PCI-E MPS turning and using
>> +				the BIOS configured MPS defaults.
> 
> 				    BIOS-configured

Will update it.

> 
>> +		pcie_bus_safe	Use the smallest common denominator MPS
>> +				of the entire tree below a root complex for every device
>> +				on that fabric. Can avoid inconsistent mps problem caused
> 
> s/mps/MPS/
> i.e., use "MPS" consistently.

Will use mps consistently.

> 
>> +				by hotplug.
>> +		pcie_bus_perf	Configure pcie device MPS to the largest allowable
>> +				MPS based on its parent bus. And also set MRRS to the
> 
> "And also" is redundant.  Just say Also.

Ok.

> 
> What is (are) MRRS?

MRRS is "Max Read Request Size" and MPS is "Max Payload Size".
Need use "Max Read Request Size" instead of MRRS ?

> 
>> +				largest supported value but cannot be configured larger
>> +				than the MPS the device or the bus can support for Max
>> +				performance.
>> +		pcie_bus_peer2peer	Make the system wide MPS the smallest
> 
> 					         system-wide

Will update it.

> 
>> +				possible value (128B).This configuration could prevent it
> 
> 				                      ^ Space before "This"
> 

Thanks for reminder.

>> +				from working by having the MPS on one root port different
>> +				than the MPS on another.
>>  		cbiosize=nn[KMG]	The fixed amount of bus space which is
>>  				reserved for the CardBus bridge's IO window.
>>  				The default value is 256 bytes.
>>
> 
>
Randy Dunlap - Jan. 24, 2013, 2:02 a.m.
On 01/23/13 17:55, Yijing Wang wrote:
> Hi Randy,
>    Thanks for your review and comments! please refer to inlined comments below.
> 
> On 2013/1/24 7:39, Randy Dunlap wrote:
>> On 01/23/13 04:28, Yijing Wang wrote:

>>
>> What is (are) MRRS?
> 
> MRRS is "Max Read Request Size" and MPS is "Max Payload Size".
> Need use "Max Read Request Size" instead of MRRS ?

Where is MRRS documented?

I would probably do it like so:

Also set MRRS (Max Read Request Size) to the ....
Yijing Wang - Jan. 24, 2013, 2:20 a.m.
On 2013/1/24 10:02, Randy Dunlap wrote:
> On 01/23/13 17:55, Yijing Wang wrote:
>> Hi Randy,
>>    Thanks for your review and comments! please refer to inlined comments below.
>>
>> On 2013/1/24 7:39, Randy Dunlap wrote:
>>> On 01/23/13 04:28, Yijing Wang wrote:
> 
>>>
>>> What is (are) MRRS?
>>
>> MRRS is "Max Read Request Size" and MPS is "Max Payload Size".
>> Need use "Max Read Request Size" instead of MRRS ?
> 
> Where is MRRS documented?

The description of MRRS can be found at PCIe Spec 2.0/3.0 7.8.4 Device Control Register.

> 
> I would probably do it like so:
> 
> Also set MRRS (Max Read Request Size) to the ....

Hmm, I will explain MPS and MRRS when they appear first time like,

pcie_bus_tune_off   Disable PCIe MPS (Max Payload Size) turning and using
		the BIOS-configured MPS defaults.

pcie_bus_perf	......Also set MRRS (Max Read Request Size) to the......

Thanks!
Yijing

>

Patch

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 363e348..1fb269b 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -2227,6 +2227,21 @@  bytes respectively. Such letter suffixes can also be entirely omitted.
 				This sorting is done to get a device
 				order compatible with older (<= 2.4) kernels.
 		nobfsort	Don't sort PCI devices into breadth-first order.
+		pcie_bus_tune_off	Disable PCI-E MPS turning and using
+				the BIOS configured MPS defaults.
+		pcie_bus_safe	Use the smallest common denominator MPS
+				of the entire tree below a root complex for every device
+				on that fabric. Can avoid inconsistent mps problem caused
+				by hotplug.
+		pcie_bus_perf	Configure pcie device MPS to the largest allowable
+				MPS based on its parent bus. And also set MRRS to the
+				largest supported value but cannot be configured larger
+				than the MPS the device or the bus can support for Max
+				performance.
+		pcie_bus_peer2peer	Make the system wide MPS the smallest
+				possible value (128B).This configuration could prevent it
+				from working by having the MPS on one root port different
+				than the MPS on another.
 		cbiosize=nn[KMG]	The fixed amount of bus space which is
 				reserved for the CardBus bridge's IO window.
 				The default value is 256 bytes.