Patchwork target-mips: enable access to DSP ASE if implemented

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Submitter Petar Jovanovic
Date Jan. 23, 2013, 2:57 a.m.
Message ID <1358909822-32336-1-git-send-email-petar.jovanovic@rt-rk.com>
Download mbox | patch
Permalink /patch/214717/
State New
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Comments

Petar Jovanovic - Jan. 23, 2013, 2:57 a.m.
From: Petar Jovanovic <petarj@mips.com>

compute_hflags() will reset DSP h-flags, so MX bit should be initially set
for usermode in cpu_state_reset() if DSP ASE is implemented.
This change will bring back user-mode support for DSP ASE, since one of the
recent changes broke it.

Signed-off-by: Petar Jovanovic <petarj@mips.com>
---
 target-mips/translate.c |    6 ++----
 1 files changed, 2 insertions(+), 4 deletions(-)
Aurelien Jarno - Jan. 31, 2013, 11:01 p.m.
On Wed, Jan 23, 2013 at 03:57:02AM +0100, Petar Jovanovic wrote:
> From: Petar Jovanovic <petarj@mips.com>
> 
> compute_hflags() will reset DSP h-flags, so MX bit should be initially set
> for usermode in cpu_state_reset() if DSP ASE is implemented.
> This change will bring back user-mode support for DSP ASE, since one of the
> recent changes broke it.
> 
> Signed-off-by: Petar Jovanovic <petarj@mips.com>
> ---
>  target-mips/translate.c |    6 ++----
>  1 files changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 206ba83..0443704 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -15933,10 +15933,8 @@ void cpu_state_reset(CPUMIPSState *env)
>      if (env->CP0_Config1 & (1 << CP0C1_FP)) {
>          env->CP0_Status |= (1 << CP0St_CU1);
>      }
> -    if (env->cpu_model->insn_flags & ASE_DSPR2) {
> -        env->hflags |= MIPS_HFLAG_DSP | MIPS_HFLAG_DSPR2;
> -    } else if (env->cpu_model->insn_flags & ASE_DSP) {
> -        env->hflags |= MIPS_HFLAG_DSP;
> +    if (env->CP0_Config3 & (1 << CP0C3_DSPP)) {
> +        env->CP0_Status |= (1 << CP0St_MX);
>      }
>  #else
>      if (env->hflags & MIPS_HFLAG_BMASK) {
> -- 
> 1.7.5.4
> 
> 

Thanks, applied.

Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 206ba83..0443704 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -15933,10 +15933,8 @@  void cpu_state_reset(CPUMIPSState *env)
     if (env->CP0_Config1 & (1 << CP0C1_FP)) {
         env->CP0_Status |= (1 << CP0St_CU1);
     }
-    if (env->cpu_model->insn_flags & ASE_DSPR2) {
-        env->hflags |= MIPS_HFLAG_DSP | MIPS_HFLAG_DSPR2;
-    } else if (env->cpu_model->insn_flags & ASE_DSP) {
-        env->hflags |= MIPS_HFLAG_DSP;
+    if (env->CP0_Config3 & (1 << CP0C3_DSPP)) {
+        env->CP0_Status |= (1 << CP0St_MX);
     }
 #else
     if (env->hflags & MIPS_HFLAG_BMASK) {