Patchwork [2/3] arm: sunxi: Add clock definitions for the new clock driver

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Submitter Emilio López
Date Jan. 22, 2013, 6:12 a.m.
Message ID <1358835176-7197-3-git-send-email-emilio@elopez.com.ar>
Download mbox | patch
Permalink /patch/214346/
State New
Headers show

Comments

Emilio López - Jan. 22, 2013, 6:12 a.m.
This introduces proper clock definitions on sunxi.dtsi, to be used
with the new clock driver for sunxi.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
---
 arch/arm/boot/dts/sunxi.dtsi | 55 +++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 49 insertions(+), 6 deletions(-)
Maxime Ripard - Jan. 30, 2013, 8:24 a.m.
Hi Emilio,

Le 22/01/2013 07:12, Emilio López a écrit :

> +		cpu: cpu@01c20054 {
> +			#clock-cells = <0>;
> +			compatible = "allwinner,sunxi-cpu-clk";
> +			reg = <0x01c20054 0x4>;
> +			clocks = <&osc32k>, <&osc24M>, <&pll1>;
> +		};

Why do you need these three clocks here ? From what you said in patch 3,
it seems like the 24M oscillator is not a direct parent, but only the
pll1 and the 32k oscillator, right?

Thanks,
Maxime
Emilio López - Jan. 30, 2013, 11:57 a.m.
Hi Maxime,

El 30/01/13 05:24, Maxime Ripard escribió:
> Hi Emilio,
> 
> Le 22/01/2013 07:12, Emilio López a écrit :
> 
>> +		cpu: cpu@01c20054 {
>> +			#clock-cells = <0>;
>> +			compatible = "allwinner,sunxi-cpu-clk";
>> +			reg = <0x01c20054 0x4>;
>> +			clocks = <&osc32k>, <&osc24M>, <&pll1>;
>> +		};
> 
> Why do you need these three clocks here ? From what you said in patch 3,
> it seems like the 24M oscillator is not a direct parent, but only the
> pll1 and the 32k oscillator, right?

There are two reasons:
 * Hardware wise it actually is a parent, as in, it is an usable source
you can choose on the mux. There is also PLL6 as an option, but it has
no representation yet so I have not listed it.

  Quoting the linux-sunxi wiki:

    0x00 = 32 KHz internal RC clock
    0x01 = 24 MHz external Oscillator
    0x02 = PLL1
    0x03 = 200 MHz sourced from PPL6

 * The example in patch 3 is simplified, you may want to switch to the
24M oscillator first. My intention was to just present the concept/idea,
the actual clock handling on standby contains some more steps; see:

https://github.com/linux-sunxi/linux-sunxi/blob/sunxi-3.0/arch/arm/mach-sun4i/pm/standby/standby.c#L179

Thanks for the review,

Emilio

Patch

diff --git a/arch/arm/boot/dts/sunxi.dtsi b/arch/arm/boot/dts/sunxi.dtsi
index 8bbc2bf..e2cef13 100644
--- a/arch/arm/boot/dts/sunxi.dtsi
+++ b/arch/arm/boot/dts/sunxi.dtsi
@@ -24,13 +24,56 @@ 
 
 	clocks {
 		#address-cells = <1>;
-		#size-cells = <0>;
+		#size-cells = <1>;
+		ranges;
 
-		osc: oscillator {
+		osc24M: osc24M@01c20050 {
 			#clock-cells = <0>;
-			compatible = "fixed-clock";
+			compatible = "allwinner,sunxi-osc-clk";
+			reg = <0x01c20050 0x4>;
 			clock-frequency = <24000000>;
 		};
+
+		osc32k: osc32k {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <32768>;
+		};
+
+		pll1: pll1@01c20000 {
+			#clock-cells = <0>;
+			compatible = "allwinner,sunxi-pll1-clk";
+			reg = <0x01c20000 0x4>;
+			clocks = <&osc24M>;
+		};
+
+		cpu: cpu@01c20054 {
+			#clock-cells = <0>;
+			compatible = "allwinner,sunxi-cpu-clk";
+			reg = <0x01c20054 0x4>;
+			clocks = <&osc32k>, <&osc24M>, <&pll1>;
+		};
+
+		axi: axi@01c20054 {
+			#clock-cells = <0>;
+			compatible = "allwinner,sunxi-axi-clk";
+			reg = <0x01c20054 0x4>;
+			clocks = <&cpu>;
+		};
+
+		ahb: ahb@01c20054 {
+			#clock-cells = <0>;
+			compatible = "allwinner,sunxi-ahb-clk";
+			reg = <0x01c20054 0x4>;
+			clocks = <&axi>;
+		};
+
+		apb0: apb0@01c20054 {
+			#clock-cells = <0>;
+			compatible = "allwinner,sunxi-apb0-clk";
+			reg = <0x01c20054 0x4>;
+			clocks = <&ahb>;
+		};
 	};
 
 	soc {
@@ -44,7 +87,7 @@ 
 			compatible = "allwinner,sunxi-timer";
 			reg = <0x01c20c00 0x90>;
 			interrupts = <22>;
-			clocks = <&osc>;
+			clocks = <&osc24M>;
 		};
 
 		wdt: watchdog@01c20c90 {
@@ -64,7 +107,7 @@ 
 			reg = <0x01c28000 0x400>;
 			interrupts = <1>;
 			reg-shift = <2>;
-			clock-frequency = <24000000>;
+			clocks = <&osc24M>;
 			status = "disabled";
 		};
 
@@ -73,7 +116,7 @@ 
 			reg = <0x01c28400 0x400>;
 			interrupts = <2>;
 			reg-shift = <2>;
-			clock-frequency = <24000000>;
+			clocks = <&osc24M>;
 			status = "disabled";
 		};
 	};