Message ID | 1358819635-28574-6-git-send-email-scottwood@freescale.com |
---|---|
State | New |
Headers | show |
On 22.01.2013, at 02:53, Scott Wood wrote: > The compatible string is changed to fsl,mpic on all e500 platforms, to > advertise the existence of BRR1. This matches what the device tree will > have on real hardware. > > With MPIC v4.2 max_cpu can be increased from 15 to 32. > > Signed-off-by: Scott Wood <scottwood@freescale.com> > --- > hw/ppc/e500.c | 4 ++-- > hw/ppc/e500.h | 2 ++ > hw/ppc/e500plat.c | 4 +++- > hw/ppc/mpc8544ds.c | 2 ++ > 4 files changed, 9 insertions(+), 3 deletions(-) > > diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c > index 530f929..b7474c0 100644 > --- a/hw/ppc/e500.c > +++ b/hw/ppc/e500.c > @@ -297,7 +297,7 @@ static int ppce500_load_device_tree(CPUPPCState *env, > snprintf(mpic, sizeof(mpic), "%s/pic@%llx", soc, MPC8544_MPIC_REGS_OFFSET); > qemu_devtree_add_subnode(fdt, mpic); > qemu_devtree_setprop_string(fdt, mpic, "device_type", "open-pic"); > - qemu_devtree_setprop_string(fdt, mpic, "compatible", "chrp,open-pic"); > + qemu_devtree_setprop_string(fdt, mpic, "compatible", "fsl,mpic"); Actually, thinking about this once more, would older kernels continue to work with "fsl,mpic"? Did the kernels that first introduced the qemu ppc machine already support "fsl,mpic" or would they rely on "chrp,open-pic"? In case of the latter, we should provide both compatibles, right? Alex
On 01/25/2013 07:03:02 AM, Alexander Graf wrote: > > On 22.01.2013, at 02:53, Scott Wood wrote: > > > The compatible string is changed to fsl,mpic on all e500 platforms, > to > > advertise the existence of BRR1. This matches what the device tree > will > > have on real hardware. > > > > With MPIC v4.2 max_cpu can be increased from 15 to 32. > > > > Signed-off-by: Scott Wood <scottwood@freescale.com> > > --- > > hw/ppc/e500.c | 4 ++-- > > hw/ppc/e500.h | 2 ++ > > hw/ppc/e500plat.c | 4 +++- > > hw/ppc/mpc8544ds.c | 2 ++ > > 4 files changed, 9 insertions(+), 3 deletions(-) > > > > diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c > > index 530f929..b7474c0 100644 > > --- a/hw/ppc/e500.c > > +++ b/hw/ppc/e500.c > > @@ -297,7 +297,7 @@ static int ppce500_load_device_tree(CPUPPCState > *env, > > snprintf(mpic, sizeof(mpic), "%s/pic@%llx", soc, > MPC8544_MPIC_REGS_OFFSET); > > qemu_devtree_add_subnode(fdt, mpic); > > qemu_devtree_setprop_string(fdt, mpic, "device_type", > "open-pic"); > > - qemu_devtree_setprop_string(fdt, mpic, "compatible", > "chrp,open-pic"); > > + qemu_devtree_setprop_string(fdt, mpic, "compatible", > "fsl,mpic"); > > Actually, thinking about this once more, would older kernels continue > to work with "fsl,mpic"? Did the kernels that first introduced the > qemu ppc machine already support "fsl,mpic" or would they rely on > "chrp,open-pic"? fsl,mpic has been there longer than the qemu ppc machine. -Scott
On 01/25/2013 10:38:39 AM, Scott Wood wrote: > On 01/25/2013 07:03:02 AM, Alexander Graf wrote: >> >> On 22.01.2013, at 02:53, Scott Wood wrote: >> >> > The compatible string is changed to fsl,mpic on all e500 >> platforms, to >> > advertise the existence of BRR1. This matches what the device >> tree will >> > have on real hardware. >> > >> > With MPIC v4.2 max_cpu can be increased from 15 to 32. >> > >> > Signed-off-by: Scott Wood <scottwood@freescale.com> >> > --- >> > hw/ppc/e500.c | 4 ++-- >> > hw/ppc/e500.h | 2 ++ >> > hw/ppc/e500plat.c | 4 +++- >> > hw/ppc/mpc8544ds.c | 2 ++ >> > 4 files changed, 9 insertions(+), 3 deletions(-) >> > >> > diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c >> > index 530f929..b7474c0 100644 >> > --- a/hw/ppc/e500.c >> > +++ b/hw/ppc/e500.c >> > @@ -297,7 +297,7 @@ static int >> ppce500_load_device_tree(CPUPPCState *env, >> > snprintf(mpic, sizeof(mpic), "%s/pic@%llx", soc, >> MPC8544_MPIC_REGS_OFFSET); >> > qemu_devtree_add_subnode(fdt, mpic); >> > qemu_devtree_setprop_string(fdt, mpic, "device_type", >> "open-pic"); >> > - qemu_devtree_setprop_string(fdt, mpic, "compatible", >> "chrp,open-pic"); >> > + qemu_devtree_setprop_string(fdt, mpic, "compatible", >> "fsl,mpic"); >> >> Actually, thinking about this once more, would older kernels >> continue to work with "fsl,mpic"? Did the kernels that first >> introduced the qemu ppc machine already support "fsl,mpic" or would >> they rely on "chrp,open-pic"? > > fsl,mpic has been there longer than the qemu ppc machine. In any case, one of the reasons the new compatible was introduced was because people didn't like claiming compatibility with chrp,open-pic after we changed #interrupt-cells (which we haven't done yet in QEMU, but at some point probably will). The device trees you'd find when running on real hardware will not have a chrp,open-pic compatible (at least, the e500v2 ones don't -- the e500mc trees have both, but shouldn't). -Scott
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 530f929..b7474c0 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -297,7 +297,7 @@ static int ppce500_load_device_tree(CPUPPCState *env, snprintf(mpic, sizeof(mpic), "%s/pic@%llx", soc, MPC8544_MPIC_REGS_OFFSET); qemu_devtree_add_subnode(fdt, mpic); qemu_devtree_setprop_string(fdt, mpic, "device_type", "open-pic"); - qemu_devtree_setprop_string(fdt, mpic, "compatible", "chrp,open-pic"); + qemu_devtree_setprop_string(fdt, mpic, "compatible", "fsl,mpic"); qemu_devtree_setprop_cells(fdt, mpic, "reg", MPC8544_MPIC_REGS_OFFSET, 0x40000); qemu_devtree_setprop_cell(fdt, mpic, "#address-cells", 0); @@ -545,7 +545,7 @@ void ppce500_init(PPCE500Params *params) mpic = g_new(qemu_irq, 256); dev = qdev_create(NULL, "openpic"); qdev_prop_set_uint32(dev, "nb_cpus", smp_cpus); - qdev_prop_set_uint32(dev, "model", OPENPIC_MODEL_FSL_MPIC_20); + qdev_prop_set_uint32(dev, "model", params->mpic_version); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); diff --git a/hw/ppc/e500.h b/hw/ppc/e500.h index f5ff273..226c93d 100644 --- a/hw/ppc/e500.h +++ b/hw/ppc/e500.h @@ -16,6 +16,8 @@ typedef struct PPCE500Params { /* required -- must at least add toplevel board compatible */ void (*fixup_devtree)(struct PPCE500Params *params, void *fdt); + + int mpic_version; } PPCE500Params; void ppce500_init(PPCE500Params *params); diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c index 2dcc4a9..25ac4b1 100644 --- a/hw/ppc/e500plat.c +++ b/hw/ppc/e500plat.c @@ -15,6 +15,7 @@ #include "../boards.h" #include "sysemu/device_tree.h" #include "hw/pci/pci.h" +#include "hw/openpic.h" static void e500plat_fixup_devtree(PPCE500Params *params, void *fdt) { @@ -44,6 +45,7 @@ static void e500plat_init(QEMUMachineInitArgs *args) .pci_first_slot = 0x1, .pci_nr_slots = PCI_SLOT_MAX - 1, .fixup_devtree = e500plat_fixup_devtree, + .mpic_version = OPENPIC_MODEL_FSL_MPIC_42, }; ppce500_init(¶ms); @@ -53,7 +55,7 @@ static QEMUMachine e500plat_machine = { .name = "ppce500", .desc = "generic paravirt e500 platform", .init = e500plat_init, - .max_cpus = 15, + .max_cpus = 32, DEFAULT_MACHINE_OPTIONS, }; diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c index 8e05e55..e25c70b 100644 --- a/hw/ppc/mpc8544ds.c +++ b/hw/ppc/mpc8544ds.c @@ -14,6 +14,7 @@ #include "e500.h" #include "../boards.h" #include "sysemu/device_tree.h" +#include "hw/openpic.h" static void mpc8544ds_fixup_devtree(PPCE500Params *params, void *fdt) { @@ -43,6 +44,7 @@ static void mpc8544ds_init(QEMUMachineInitArgs *args) .pci_first_slot = 0x11, .pci_nr_slots = 2, .fixup_devtree = mpc8544ds_fixup_devtree, + .mpic_version = OPENPIC_MODEL_FSL_MPIC_20, }; ppce500_init(¶ms);
The compatible string is changed to fsl,mpic on all e500 platforms, to advertise the existence of BRR1. This matches what the device tree will have on real hardware. With MPIC v4.2 max_cpu can be increased from 15 to 32. Signed-off-by: Scott Wood <scottwood@freescale.com> --- hw/ppc/e500.c | 4 ++-- hw/ppc/e500.h | 2 ++ hw/ppc/e500plat.c | 4 +++- hw/ppc/mpc8544ds.c | 2 ++ 4 files changed, 9 insertions(+), 3 deletions(-)