Patchwork [1/2] powerpc/mpic: allow coreint to be determined by MPIC version

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Submitter Scott Wood
Date Jan. 22, 2013, 1:56 a.m.
Message ID <1358819804-28665-1-git-send-email-scottwood@freescale.com>
Download mbox | patch
Permalink /patch/214334/
State Accepted, archived
Commit 7c509ee01496a170fe4329f076c334591b6f49d0
Delegated to: Kumar Gala
Headers show

Comments

Scott Wood - Jan. 22, 2013, 1:56 a.m.
This will be used by the qemu-e500 platform, as the MPIC version (and
thus whether we have coreint) depends on how QEMU is configured.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/mpic.c |   26 +++++++++++++++++++++++---
 1 file changed, 23 insertions(+), 3 deletions(-)
Kumar Gala - Jan. 23, 2013, 5:23 p.m.
On Jan 21, 2013, at 7:56 PM, Scott Wood wrote:

> This will be used by the qemu-e500 platform, as the MPIC version (and
> thus whether we have coreint) depends on how QEMU is configured.
> 
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> arch/powerpc/sysdev/mpic.c |   26 +++++++++++++++++++++++---
> 1 file changed, 23 insertions(+), 3 deletions(-)

Is the idea that we'd set mpic->flags such that MPIC_ENABLE_COREINT was set, but based on the controller version we'd ignore the flag?

- k
Scott Wood - Jan. 23, 2013, 5:28 p.m.
On 01/23/2013 11:23:51 AM, Kumar Gala wrote:
> 
> On Jan 21, 2013, at 7:56 PM, Scott Wood wrote:
> 
> > This will be used by the qemu-e500 platform, as the MPIC version  
> (and
> > thus whether we have coreint) depends on how QEMU is configured.
> >
> > Signed-off-by: Scott Wood <scottwood@freescale.com>
> > ---
> > arch/powerpc/sysdev/mpic.c |   26 +++++++++++++++++++++++---
> > 1 file changed, 23 insertions(+), 3 deletions(-)
> 
> Is the idea that we'd set mpic->flags such that MPIC_ENABLE_COREINT  
> was set, but based on the controller version we'd ignore the flag?

Yes, at least for platforms like qemu-e500 where both are posssible  
(see patch 2/2).

-Scott
Kumar Gala - Feb. 15, 2013, 8:14 p.m.
On Jan 21, 2013, at 7:56 PM, Scott Wood wrote:

> This will be used by the qemu-e500 platform, as the MPIC version (and
> thus whether we have coreint) depends on how QEMU is configured.
> 
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> arch/powerpc/sysdev/mpic.c |   26 +++++++++++++++++++++++---
> 1 file changed, 23 insertions(+), 3 deletions(-)

applied to next

- k

Patch

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 6694425..d30e6a6 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1182,6 +1182,7 @@  struct mpic * __init mpic_alloc(struct device_node *node,
 	const char *vers;
 	const u32 *psrc;
 	u32 last_irq;
+	u32 fsl_version = 0;
 
 	/* Default MPIC search parameters */
 	static const struct of_device_id __initconst mpic_device_id[] = {
@@ -1314,7 +1315,7 @@  struct mpic * __init mpic_alloc(struct device_node *node,
 	mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
 
 	if (mpic->flags & MPIC_FSL) {
-		u32 brr1, version;
+		u32 brr1;
 		int ret;
 
 		/*
@@ -1327,7 +1328,7 @@  struct mpic * __init mpic_alloc(struct device_node *node,
 
 		brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
 				MPIC_FSL_BRR1);
-		version = brr1 & MPIC_FSL_BRR1_VER;
+		fsl_version = brr1 & MPIC_FSL_BRR1_VER;
 
 		/* Error interrupt mask register (EIMR) is required for
 		 * handling individual device error interrupts. EIMR
@@ -1342,11 +1343,30 @@  struct mpic * __init mpic_alloc(struct device_node *node,
 		 * is the number of vectors which have been consumed by
 		 * ipis and timer interrupts.
 		 */
-		if (version >= 0x401) {
+		if (fsl_version >= 0x401) {
 			ret = mpic_setup_error_int(mpic, intvec_top - 12);
 			if (ret)
 				return NULL;
 		}
+
+	}
+
+	/*
+	 * EPR is only available starting with v4.0.  To support
+	 * platforms that don't know the MPIC version at compile-time,
+	 * such as qemu-e500, turn off coreint if this MPIC doesn't
+	 * support it.  Note that we never enable it if it wasn't
+	 * requested in the first place.
+	 *
+	 * This is done outside the MPIC_FSL check, so that we
+	 * also disable coreint if the MPIC node doesn't have
+	 * an "fsl,mpic" compatible at all.  This will be the case
+	 * with device trees generated by older versions of QEMU.
+	 * fsl_version will be zero if MPIC_FSL is not set.
+	 */
+	if (fsl_version < 0x400 && (flags & MPIC_ENABLE_COREINT)) {
+		WARN_ON(ppc_md.get_irq != mpic_get_coreint_irq);
+		ppc_md.get_irq = mpic_get_irq;
 	}
 
 	/* Reset */