From patchwork Mon Jan 21 21:21:36 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Williamson X-Patchwork-Id: 214281 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 7E3912C0087 for ; Tue, 22 Jan 2013 09:16:22 +1100 (EST) Received: from localhost ([::1]:46558 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TxPfA-0004Io-KU for incoming@patchwork.ozlabs.org; Mon, 21 Jan 2013 17:16:20 -0500 Received: from eggs.gnu.org ([208.118.235.92]:55961) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TxPf2-0004Ie-Gi for qemu-devel@nongnu.org; Mon, 21 Jan 2013 17:16:15 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TxPez-0003T5-SC for qemu-devel@nongnu.org; Mon, 21 Jan 2013 17:16:12 -0500 Received: from mx1.redhat.com ([209.132.183.28]:52955) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TxPez-0003Su-JF for qemu-devel@nongnu.org; Mon, 21 Jan 2013 17:16:09 -0500 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r0LMG7ST024240 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 21 Jan 2013 17:16:08 -0500 Received: from bling.home ([10.3.113.8]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id r0LLLaiL022180; Mon, 21 Jan 2013 16:21:36 -0500 To: seabios@seabios.org From: Alex Williamson Date: Mon, 21 Jan 2013 14:21:36 -0700 Message-ID: <20130121212136.29089.65825.stgit@bling.home> In-Reply-To: <20130121205015.29089.93802.stgit@bling.home> References: <20130121205015.29089.93802.stgit@bling.home> User-Agent: StGit/0.16 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: qemu-devel@nongnu.org Subject: [Qemu-devel] [RFC PATCH 2/2] q35: Fix ACPI _PRT routing to match PIIX X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org When seabios programs PCI interrupt line registers it expects a specific slot:pin to PIRQ mapping (see pci_slot_get_irq). If we want to re-use this function between both PIIX and ICH9, then the _PRT exposed to the guest needs to change. NB. slots 25-31 on ICH9 don't follow this routing pattern and can be changed independently, so even with this boot ROMs behind express ports may not work correctly with interrupts. We can possibly make them follow this pattern or come up with a new mch_pci_slot_get_irq() function, in which case we don't need to match PIIX. PIIX slot:pin array - D/A/B/C, A/B/C/D, B/C/D/A, C/D/A/B Current ICH9 - E/F/G/H, F/G/H/E, G/H/E/F, H/E/F/G Revised ICH9 - H/E/F/G, E/F/G/H, F/G/H/E, G/H/E/F Signed-off-by: Alex Williamson --- src/q35-acpi-dsdt.dsl | 100 +++++++++++++++++++++++++------------------------ 1 file changed, 50 insertions(+), 50 deletions(-) diff --git a/src/q35-acpi-dsdt.dsl b/src/q35-acpi-dsdt.dsl index c031d83..ebb9349 100644 --- a/src/q35-acpi-dsdt.dsl +++ b/src/q35-acpi-dsdt.dsl @@ -201,31 +201,31 @@ DefinitionBlock ( #define prt_slot_lnkH(nr) prt_slot_lnk(nr, LNKH, LNKE, LNKF, LNKG) Name(PRTP, package() { - prt_slot_lnkE(0x0000), - prt_slot_lnkF(0x0001), - prt_slot_lnkG(0x0002), - prt_slot_lnkH(0x0003), - prt_slot_lnkE(0x0004), - prt_slot_lnkF(0x0005), - prt_slot_lnkG(0x0006), - prt_slot_lnkH(0x0007), - prt_slot_lnkE(0x0008), - prt_slot_lnkF(0x0009), - prt_slot_lnkG(0x000a), - prt_slot_lnkH(0x000b), - prt_slot_lnkE(0x000c), - prt_slot_lnkF(0x000d), - prt_slot_lnkG(0x000e), - prt_slot_lnkH(0x000f), - prt_slot_lnkE(0x0010), - prt_slot_lnkF(0x0011), - prt_slot_lnkG(0x0012), - prt_slot_lnkH(0x0013), - prt_slot_lnkE(0x0014), - prt_slot_lnkF(0x0015), - prt_slot_lnkG(0x0016), - prt_slot_lnkH(0x0017), - prt_slot_lnkE(0x0018), + prt_slot_lnkH(0x0000), + prt_slot_lnkE(0x0001), + prt_slot_lnkF(0x0002), + prt_slot_lnkG(0x0003), + prt_slot_lnkH(0x0004), + prt_slot_lnkE(0x0005), + prt_slot_lnkF(0x0006), + prt_slot_lnkG(0x0007), + prt_slot_lnkH(0x0008), + prt_slot_lnkE(0x0009), + prt_slot_lnkF(0x000a), + prt_slot_lnkG(0x000b), + prt_slot_lnkH(0x000c), + prt_slot_lnkE(0x000d), + prt_slot_lnkF(0x000e), + prt_slot_lnkG(0x000f), + prt_slot_lnkH(0x0010), + prt_slot_lnkE(0x0011), + prt_slot_lnkF(0x0012), + prt_slot_lnkG(0x0013), + prt_slot_lnkH(0x0014), + prt_slot_lnkE(0x0015), + prt_slot_lnkF(0x0016), + prt_slot_lnkG(0x0017), + prt_slot_lnkH(0x0018), /* INTA -> PIRQA for slot 25 - 31 see the default value of DIR */ @@ -258,31 +258,31 @@ DefinitionBlock ( #define prt_slot_gsiH(nr) prt_slot_gsi(nr, GSIH, GSIE, GSIF, GSIG) Name(PRTA, package() { - prt_slot_gsiE(0x0000), - prt_slot_gsiF(0x0001), - prt_slot_gsiG(0x0002), - prt_slot_gsiH(0x0003), - prt_slot_gsiE(0x0004), - prt_slot_gsiF(0x0005), - prt_slot_gsiG(0x0006), - prt_slot_gsiH(0x0007), - prt_slot_gsiE(0x0008), - prt_slot_gsiF(0x0009), - prt_slot_gsiG(0x000a), - prt_slot_gsiH(0x000b), - prt_slot_gsiE(0x000c), - prt_slot_gsiF(0x000d), - prt_slot_gsiG(0x000e), - prt_slot_gsiH(0x000f), - prt_slot_gsiE(0x0010), - prt_slot_gsiF(0x0011), - prt_slot_gsiG(0x0012), - prt_slot_gsiH(0x0013), - prt_slot_gsiE(0x0014), - prt_slot_gsiF(0x0015), - prt_slot_gsiG(0x0016), - prt_slot_gsiH(0x0017), - prt_slot_gsiE(0x0018), + prt_slot_gsiH(0x0000), + prt_slot_gsiE(0x0001), + prt_slot_gsiF(0x0002), + prt_slot_gsiG(0x0003), + prt_slot_gsiH(0x0004), + prt_slot_gsiE(0x0005), + prt_slot_gsiF(0x0006), + prt_slot_gsiG(0x0007), + prt_slot_gsiH(0x0008), + prt_slot_gsiE(0x0009), + prt_slot_gsiF(0x000a), + prt_slot_gsiG(0x000b), + prt_slot_gsiH(0x000c), + prt_slot_gsiE(0x000d), + prt_slot_gsiF(0x000e), + prt_slot_gsiG(0x000f), + prt_slot_gsiH(0x0010), + prt_slot_gsiE(0x0011), + prt_slot_gsiF(0x0012), + prt_slot_gsiG(0x0013), + prt_slot_gsiH(0x0014), + prt_slot_gsiE(0x0015), + prt_slot_gsiF(0x0016), + prt_slot_gsiG(0x0017), + prt_slot_gsiH(0x0018), /* INTA -> PIRQA for slot 25 - 31, but 30 see the default value of DIR */