From patchwork Sun Jan 20 07:22:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 213941 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id ECE9B2C0086 for ; Sun, 20 Jan 2013 19:57:18 +1100 (EST) Received: from localhost ([::1]:36715 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TwpG3-00089h-M9 for incoming@patchwork.ozlabs.org; Sun, 20 Jan 2013 02:23:59 -0500 Received: from eggs.gnu.org ([208.118.235.92]:49635) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TwpFQ-0006ba-K9 for qemu-devel@nongnu.org; Sun, 20 Jan 2013 02:23:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TwpFN-0006bn-2s for qemu-devel@nongnu.org; Sun, 20 Jan 2013 02:23:20 -0500 Received: from cantor2.suse.de ([195.135.220.15]:45243 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TwpFM-0006bD-Ph for qemu-devel@nongnu.org; Sun, 20 Jan 2013 02:23:17 -0500 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 02999A3B99; Sun, 20 Jan 2013 08:23:15 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Sun, 20 Jan 2013 08:22:34 +0100 Message-Id: <1358666571-1737-12-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1358666571-1737-1-git-send-email-afaerber@suse.de> References: <1358666571-1737-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno Subject: [Qemu-devel] [RFC qom-cpu v2 11/28] target-mips: Introduce QOM realizefn for MIPSCPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce a realizefn and set realized = true from cpu_mips_init(). Signed-off-by: Andreas Färber --- target-mips/cpu-qom.h | 2 ++ target-mips/cpu.c | 15 +++++++++++++++ target-mips/translate.c | 5 +++-- 3 Dateien geändert, 20 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-) diff --git a/target-mips/cpu-qom.h b/target-mips/cpu-qom.h index 2a4b812..55aa692 100644 --- a/target-mips/cpu-qom.h +++ b/target-mips/cpu-qom.h @@ -37,6 +37,7 @@ /** * MIPSCPUClass: + * @parent_realize: The parent class' realize handler. * @parent_reset: The parent class' reset handler. * * A MIPS CPU model. @@ -46,6 +47,7 @@ typedef struct MIPSCPUClass { CPUClass parent_class; /*< public >*/ + DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); } MIPSCPUClass; diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 10ff46d..18895da 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -42,6 +42,17 @@ static void mips_cpu_reset(CPUState *s) cpu_state_reset(env); } +static void mips_cpu_realizefn(DeviceState *dev, Error **errp) +{ + MIPSCPU *cpu = MIPS_CPU(dev); + MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev); + + cpu_reset(CPU(cpu)); + qemu_init_vcpu(&cpu->env); + + mcc->parent_realize(dev, errp); +} + static void mips_cpu_initfn(Object *obj) { MIPSCPU *cpu = MIPS_CPU(obj); @@ -54,6 +65,10 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) { MIPSCPUClass *mcc = MIPS_CPU_CLASS(c); CPUClass *cc = CPU_CLASS(c); + DeviceClass *dc = DEVICE_CLASS(c); + + mcc->parent_realize = dc->realize; + dc->realize = mips_cpu_realizefn; mcc->parent_reset = cc->reset; cc->reset = mips_cpu_reset; diff --git a/target-mips/translate.c b/target-mips/translate.c index 206ba83..9ea9354 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -15871,8 +15871,9 @@ MIPSCPU *cpu_mips_init(const char *cpu_model) fpu_init(env, def); mvp_init(env, def); mips_tcg_init(); - cpu_reset(CPU(cpu)); - qemu_init_vcpu(env); + + object_property_set_bool(OBJECT(cpu), true, "realized", NULL); + return cpu; }