From patchwork Sat Jan 19 22:28:11 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grant Likely X-Patchwork-Id: 213890 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 301EE2C0086 for ; Sun, 20 Jan 2013 11:20:17 +1100 (EST) Received: from localhost ([::1]:52380 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Twidx-000337-Fj for incoming@patchwork.ozlabs.org; Sat, 19 Jan 2013 19:20:13 -0500 Received: from eggs.gnu.org ([208.118.235.92]:55294) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Twidh-0002r1-Hh for qemu-devel@nongnu.org; Sat, 19 Jan 2013 19:20:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Twidg-00025K-68 for qemu-devel@nongnu.org; Sat, 19 Jan 2013 19:19:57 -0500 Received: from mail-qa0-f51.google.com ([209.85.216.51]:53615) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Twidg-00024o-2G for qemu-devel@nongnu.org; Sat, 19 Jan 2013 19:19:56 -0500 Received: by mail-qa0-f51.google.com with SMTP id i20so3888963qad.17 for ; Sat, 19 Jan 2013 16:19:55 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=Vwmt3uBdyFbT5rMJafeuuoZCs89SIEDP2VOXgG7FNnU=; b=jYOVBvWkpes5f9jjxSMz4rT+BluyasXS9Q+bZnjlr+HHAO6gjWNVhzak3HBxs7Ji7b TU/F/ZeAFiEU5lJg72nFviZZ/W3vgD0hyzLcfHq2DdMOwNghv5gzXuIqcqj2Um69n2u3 KkRpGlgokPMolNobKyerUhIAnvmWe2kwIr/5LIzpKdTGVjeJVJm+w5eNWj6ITiETdh6f GJryTtr4D4fd2OxBmXs4e8NMkc0Xusditp8GVOZmRPeALvhuejviDbf0dClGs7XNQOKT B9e9bgfEyU3TSoPyILqeyHkbxv3gX3B+opNUEzYKA+u+n5XtGQ47CS3RlGz7aOBUrqpW eslw== X-Received: by 10.229.137.131 with SMTP id w3mr3465316qct.40.1358641195707; Sat, 19 Jan 2013 16:19:55 -0800 (PST) Received: from localhost (7-210-static-ppp.3menatwork.com. [64.235.210.7]) by mx.google.com with ESMTPS id eg9sm6131146qab.7.2013.01.19.16.19.52 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 19 Jan 2013 16:19:54 -0800 (PST) Received: by localhost (Postfix, from userid 1000) id 11BE63E0AD7; Sat, 19 Jan 2013 22:28:16 +0000 (GMT) From: Grant Likely To: qemu-devel@nongnu.org Date: Sat, 19 Jan 2013 18:28:11 -0400 Message-Id: <1358634492-22627-3-git-send-email-grant.likely@secretlab.ca> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1358634492-22627-1-git-send-email-grant.likely@secretlab.ca> References: <1358634492-22627-1-git-send-email-grant.likely@secretlab.ca> X-Gm-Message-State: ALoCoQkWU4if59ERWAy79g3EBPsi7ZDDligs/ODVvZhF1WkJLDzmoMmU9N8MsuHvKhncGocD1b9S X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.216.51 Cc: Grant Likely , Peter Maydell , Anthony Liguori , Paul Brook , "Edgar E. Iglesias" Subject: [Qemu-devel] [PATCH 2/3] net/bitbang_mdio: Never set PHY RST and ANEG_RST bits on register write X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The RST and ANEG_RST bits are commands, not settings. An operating system will get confused (or at least u-boot does) if those bits remain set after writing to them. Therefore, mask them out on write. Cc: Peter Maydell Cc: Paul Brook Cc: Edgar E. Iglesias Cc: Anthony Liguori Signed-off-by: Grant Likely --- hw/bitbang_mdio.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/hw/bitbang_mdio.c b/hw/bitbang_mdio.c index f0ee6af..28ac695 100644 --- a/hw/bitbang_mdio.c +++ b/hw/bitbang_mdio.c @@ -30,6 +30,10 @@ #define D(x) /* Advertisement control register. */ +#define PHY_CNTL_REG 0 +#define PHY_CNTL_RST 0x8000 /* PHY reset command */ +#define PHY_CNTL_ANEG_RST 0x0200 /* Autonegotiation reset command */ + #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ #define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ @@ -106,6 +110,10 @@ static void tdk_write(struct qemu_phy *phy, unsigned int req, unsigned int data) regnum = req & 0x1f; D(printf("%s reg[%d] = %x\n", __func__, regnum, data)); switch (regnum) { + case PHY_CNTL_REG: + /* Don't ever store the RST or ANEG_RST bits; they are commands */ + phy->regs[regnum] = data & ~(PHY_CNTL_RST | PHY_CNTL_ANEG_RST); + break; default: phy->regs[regnum] = data; break; @@ -114,7 +122,7 @@ static void tdk_write(struct qemu_phy *phy, unsigned int req, unsigned int data) void tdk_init(struct qemu_phy *phy) { - phy->regs[0] = 0x3100; + phy->regs[PHY_CNTL_REG] = 0x3100; /* PHY Id. */ phy->regs[2] = 0x0300; phy->regs[3] = 0xe400;