From patchwork Fri Jan 18 06:33:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [18/18] hw: add QEMU model for embedded ROM of SoC chips Date: Thu, 17 Jan 2013 20:33:15 -0000 From: Dante X-Patchwork-Id: 213497 Message-Id: <1358490795-18791-1-git-send-email-dantesu@faraday-tech.com> To: Cc: peter.maydell@linaro.org, paul@codesourcery.com, dantesu@faraday-tech.com Signed-off-by: Kuo-Jung Su --- hw/rom.c | 126 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 126 insertions(+) create mode 100644 hw/rom.c diff --git a/hw/rom.c b/hw/rom.c new file mode 100644 index 0000000..260b78b --- /dev/null +++ b/hw/rom.c @@ -0,0 +1,126 @@ +/* + * QEMU model of ROM + * + * Copyright (C) 2012 Faraday Technology + * Copyright (C) 2012 Dante Su + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "sysbus.h" +#include "sysemu/sysemu.h" +#include "sysemu/blockdev.h" + +typedef struct { + SysBusDevice busdev; + MemoryRegion mem; + MemoryRegion *mem_mappings; /* array; one per mapping */ + MemoryRegion orig_mem; + BlockDriverState *bdrv; + uint8_t *storage; + uint32_t size; +} rom_state; + +static uint64_t +rom_mem_read(void *opaque, hwaddr addr, unsigned int size) +{ + return 0; +} + +static void +rom_mem_write(void *opaque, hwaddr addr, uint64_t val64, unsigned int size) +{ +} + +static const MemoryRegionOps rom_ops = { + .read = rom_mem_read, + .write = rom_mem_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 8 + } +}; + +static int rom_init(SysBusDevice *dev) +{ + rom_state *s = FROM_SYSBUS(typeof(*s), dev); + DriveInfo *dinfo; + + memory_region_init_rom_device(&s->orig_mem, &rom_ops, s, "rom", s->size); + vmstate_register_ram(&s->orig_mem, DEVICE(s)); + s->storage = memory_region_get_ram_ptr(&s->orig_mem); + + dinfo = drive_get_next(IF_PFLASH); + if (dinfo && dinfo->bdrv) { + s->bdrv = dinfo->bdrv; + /* read the initial flash content */ + bdrv_read(s->bdrv, 0, s->storage, DIV_ROUND_UP(s->size, + BDRV_SECTOR_SIZE)); + } else { + memset(s->storage, 0x00, s->size); + } + + memory_region_init(&s->mem, "rom", s->size); + s->mem_mappings = g_new(MemoryRegion, 1); + memory_region_init_alias(&s->mem_mappings[0], "rom-alias", &s->orig_mem, 0, s->size); + memory_region_add_subregion(&s->mem, 0, &s->mem_mappings[0]); + + sysbus_init_mmio(dev, &s->mem); + return 0; +} + +static Property rom_properties[] = { + DEFINE_PROP_UINT32("size", rom_state, size, 16384), + DEFINE_PROP_END_OF_LIST(), +}; + +static const VMStateDescription vmstate_rom = { + .name = "rom", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .fields = (VMStateField[]) { + VMSTATE_END_OF_LIST() + } +}; + +static void rom_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); + + k->init = rom_init; + dc->props = rom_properties; + dc->vmsd = &vmstate_rom; +} + +static TypeInfo rom_info = { + .name = "rom", + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(rom_state), + .class_init = rom_class_init, +}; + +static void rom_register_types(void) +{ + type_register_static(&rom_info); +} + +type_init(rom_register_types)