From patchwork Fri Jan 18 06:17:11 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: hw/m25p80.c: add WRSR(0x01) support Date: Thu, 17 Jan 2013 20:17:11 -0000 From: Dante X-Patchwork-Id: 213475 Message-Id: <1358489831-18005-1-git-send-email-dantesu@faraday-tech.com> To: Cc: peter.crosthwaite@petalogix.com, Dante Atmel, SST and Intel/Numonyx serial flash tend to power up with the software protection bits set. And thus the new m25p80.c in linux kernel would always tries to use WREN(0x06) + WRSR(0x01) to turn-off the protection. The WEL(0x02) of status register is supposed to be cleared after WRSR(0x01). There are some drivers (i.e my own tiny driver for RTOSes) would check the WEL(0x02) in status register to make sure the protection is correctly turned off, so this patch is mandatory to me. Signed-off-by: Kuo-Jung Su --- hw/m25p80.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/hw/m25p80.c b/hw/m25p80.c index d392656..c8d0411 100644 --- a/hw/m25p80.c +++ b/hw/m25p80.c @@ -184,6 +184,7 @@ static const FlashPartInfo known_devices[] = { typedef enum { NOP = 0, + WRSR = 0x1, WRDI = 0x4, RDSR = 0x5, WREN = 0x6, @@ -377,6 +378,12 @@ static void complete_collecting_data(Flash *s) case ERASE_SECTOR: flash_erase(s, s->cur_addr, s->cmd_in_progress); break; + case WRSR: + if (s->write_enable) { + s->state = STATE_IDLE; + s->write_enable = false; + } + break; default: break; } @@ -440,6 +447,15 @@ static void decode_new_cmd(Flash *s, uint32_t value) s->len = 0; s->state = STATE_COLLECTING_DATA; break; + + case WRSR: + if (s->write_enable) { + s->needed_bytes = 1; + s->pos = 0; + s->len = 0; + s->state = STATE_COLLECTING_DATA; + } + break; case WRDI: s->write_enable = false;