From patchwork Wed Jan 16 17:26:55 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 212853 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 864462C0087 for ; Thu, 17 Jan 2013 04:27:18 +1100 (EST) Comment: DKIM? See http://www.dkim.org DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=gcc.gnu.org; s=default; x=1358962038; h=Comment: DomainKey-Signature:Received:Received:Received:Received: MIME-Version:Received:Date:Message-ID:Subject:From:To:Cc: Content-Type:Mailing-List:Precedence:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:Sender:Delivered-To; bh=R8vCqJb AetdIMThezL6dhGNDzaY=; b=iS13Q4UCxSkn4JH1XFheGkxRGGb5c2z4Fsoh4ms KEEmiJ3YhYyuKPBNMPsf3F5wf6hzhNWOE9xp0NdUgNB36q2jte6JuJV6BG4e0ESh A5W33wdDq8p5h+lOzRYE7qqeWC+lEvnyDfWegbr0H708dH4+JUC/RUElKx9K+JYc Eh+w= Comment: DomainKeys? See http://antispam.yahoo.com/domainkeys DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=gcc.gnu.org; h=Received:Received:X-SWARE-Spam-Status:X-Spam-Check-By:Received:Received:MIME-Version:X-Received:Received:Date:Message-ID:Subject:From:To:Cc:Content-Type:Mailing-List:Precedence:List-Id:List-Unsubscribe:List-Archive:List-Post:List-Help:Sender:Delivered-To; b=xNTC98K7wmZRcprTJQTm7JtZXWzRIzqyx+Me+ZgLI8mQhaFJHef++F00CXLlXu BQWyZWL8iOVe0MlhW45PT+L2nd5nXTwifntGCin8GvQLdXAMkdSvl2UEdIiSV6gZ NOOmhX6Z2Y8rIUO5cXF42aHD0yNXBhznH4PxNq9CYFacU=; Received: (qmail 13445 invoked by alias); 16 Jan 2013 17:27:02 -0000 Received: (qmail 13423 invoked by uid 22791); 16 Jan 2013 17:27:01 -0000 X-SWARE-Spam-Status: No, hits=-4.3 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, KHOP_RCVD_TRUST, RCVD_IN_DNSWL_LOW, RCVD_IN_HOSTKARMA_YE, TW_ZJ X-Spam-Check-By: sourceware.org Received: from mail-oa0-f45.google.com (HELO mail-oa0-f45.google.com) (209.85.219.45) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 16 Jan 2013 17:26:55 +0000 Received: by mail-oa0-f45.google.com with SMTP id i18so1689199oag.32 for ; Wed, 16 Jan 2013 09:26:55 -0800 (PST) MIME-Version: 1.0 X-Received: by 10.182.54.102 with SMTP id i6mr1457357obp.67.1358357215263; Wed, 16 Jan 2013 09:26:55 -0800 (PST) Received: by 10.182.153.201 with HTTP; Wed, 16 Jan 2013 09:26:55 -0800 (PST) Date: Wed, 16 Jan 2013 18:26:55 +0100 Message-ID: Subject: [PATCH, i386] Fix PR55981, atomic store is split in two smaller stores From: Uros Bizjak To: gcc-patches@gcc.gnu.org Cc: Richard Henderson , "Joseph S. Myers" Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hello! Using plain movdi pattern is not guaranteed to be atomic for all operands. For x86_64, when storing DImode immediate outside SImode range, the compiler splits the move into two separate SImode moves, violating atomic assumptions. Attached patch generates atomic store for all supported input arguments. A related questions about volatile stores: - Does language standard guarantee atomic store in this case [wikipedia says "No." [1]]? - Can a store to a volatile DImode location be implemented as two consecutive SImode stores to adjacent location (this breaks stores to MMIO 64bit registers)? 2012-01-16 Uros Bizjak PR target/55981 * config/i386/sync.md (atomic_store): Always generate SWImode store through atomic_store_1. (atomic_store_1): Macroize insn using SWI mode iterator. testsuite/ChangeLog: 2012-01-16 Uros Bizjak PR target/55981 * gcc.target/pr55981.c: New test. Tested on x86_64-pc-linux-gnu. I will wait a couple of days for possible comments. [1] http://en.wikipedia.org/wiki/Volatile_variable#In_C_and_C.2B.2B Uros. Index: config/i386/sync.md =================================================================== --- config/i386/sync.md (revision 195240) +++ config/i386/sync.md (working copy) @@ -225,11 +225,8 @@ } /* Otherwise use a store. */ - if (INTVAL (operands[2]) & IX86_HLE_RELEASE) - emit_insn (gen_atomic_store_1 (operands[0], operands[1], - operands[2])); - else - emit_move_insn (operands[0], operands[1]); + emit_insn (gen_atomic_store_1 (operands[0], operands[1], + operands[2])); } /* ... followed by an MFENCE, if required. */ if (model == MEMMODEL_SEQ_CST) @@ -238,10 +235,10 @@ }) (define_insn "atomic_store_1" - [(set (match_operand:ATOMIC 0 "memory_operand" "=m") - (unspec:ATOMIC [(match_operand:ATOMIC 1 "" "") - (match_operand:SI 2 "const_int_operand")] - UNSPEC_MOVA))] + [(set (match_operand:SWI 0 "memory_operand" "=m") + (unspec:SWI [(match_operand:SWI 1 "" "") + (match_operand:SWI 2 "const_int_operand")] + UNSPEC_MOVA))] "" "%K2mov{}\t{%1, %0|%0, %1}") Index: testsuite/gcc.target/i386/pr55981.c =================================================================== --- testsuite/gcc.target/i386/pr55981.c (revision 0) +++ testsuite/gcc.target/i386/pr55981.c (working copy) @@ -0,0 +1,54 @@ +/* { dg-do compile { target { ! { ia32 } } } } */ +/* { dg-options "-O2" } */ + +volatile int a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p; + +volatile long long y; + +void +test () +{ + int a_ = a; + int b_ = b; + int c_ = c; + int d_ = d; + int e_ = e; + int f_ = f; + int g_ = g; + int h_ = h; + int i_ = i; + int j_ = j; + int k_ = k; + int l_ = l; + int m_ = m; + int n_ = n; + int o_ = o; + int p_ = p; + + int z; + + for (z = 0; z < 1000; z++) + { + __atomic_store_n (&y, 0x100000002ll, __ATOMIC_SEQ_CST); + __atomic_store_n (&y, 0x300000004ll, __ATOMIC_SEQ_CST); + } + + a = a_; + b = b_; + c = c_; + d = d_; + e = e_; + f = f_; + g = g_; + h = h_; + i = i_; + j = j_; + k = k_; + l = l_; + m = m_; + n = n_; + o = o_; + p = p_; +} + +/* { dg-final { scan-assembler-times "movabs" 2 } } */