Patchwork [096/222] drm/i915: drop buggy write to FDI_RX_CHICKEN register

mail settings
Submitter Herton Ronaldo Krzesinski
Date Jan. 16, 2013, 3:54 p.m.
Message ID <>
Download mbox | patch
Permalink /patch/212674/
State New
Headers show


Herton Ronaldo Krzesinski - Jan. 16, 2013, 3:54 p.m. -stable review patch.  If anyone has any objections, please let me know.


From: Daniel Vetter <>

commit 607a6f7a6621f65706ff536b2615ee65b5c2f575 upstream.

Jani Nikula noticed that the parentheses are wrong and we & the bit
with the register address instead of the read-back value. He sent a
patch to correct that.

On second look, we write the same register in the previous line, and
the w/a seems to be to set FDI_RX_PHASE_SYNC_POINTER_OVR to enable the
logic, then keep always set FDI_RX_PHASE_SYNC_POINTER_OVR and toggle
FDI_RX_PHASE_SYNC_POINTER_EN before/after enabling the pc transcoder.

So the right things seems to be to simply kill the 2nd write.

Cc: Jani Nikula <>
Reviewed-by: Chris Wilson <>
[danvet: Dropped a bogus ~ from the commit message that somehow crept
Signed-off-by: Daniel Vetter <>
[ herton: this looks a good bug fix, which also makes the next patch,
 "drm/i915: disable cpt phase pointer fdi rx workaround", easier to apply ]
Signed-off-by: Herton Ronaldo Krzesinski <>
 drivers/gpu/drm/i915/intel_display.c |    3 ---
 1 file changed, 3 deletions(-)


diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c69444a..98ea04e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2609,9 +2609,6 @@  static void ironlake_fdi_disable(struct drm_crtc *crtc)
 	/* Ironlake workaround, disable clock pointer after downing FDI */
 	if (HAS_PCH_IBX(dev)) {
-			   I915_READ(FDI_RX_CHICKEN(pipe) &
 	} else if (HAS_PCH_CPT(dev)) {
 		cpt_phase_pointer_disable(dev, pipe);