Patchwork mtd: mxc_nand: compress ID info for send_read_id_v3

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Submitter Roman Schneider
Date Jan. 15, 2013, 3:56 p.m.
Message ID <1358265384-23138-1-git-send-email-schneider@at.festo.com>
Download mbox | patch
Permalink /patch/212214/
State Accepted
Commit a8459f21ed48fc366ad49ce9828f6bbb1cfac9a9
Headers show

Comments

Roman Schneider - Jan. 15, 2013, 3:56 p.m.
---
 Also compress the id in case of a v3 NAND flash controller (i.mx51, i.mx53)
 and 16Bit buswidth.

 drivers/mtd/nand/mxc_nand.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)
Artem Bityutskiy - Jan. 17, 2013, 10:55 a.m.
On Tue, 2013-01-15 at 16:56 +0100, Roman Schneider wrote:
> ---
>  Also compress the id in case of a v3 NAND flash controller (i.mx51, i.mx53)
>  and 16Bit buswidth.

Unfortunately I cannot compile-test it with the configuration I have.
This is not your fault, just a breakage in upstream. I'll wait when this
is fixed upstream, and then take a look at your patch. The breakage is:

arch/arm/mach-imx/built-in.o: In function `imx6q_restart':
platform-spi_imx.c:(.text+0x2220): undefined reference to `imx_src_prepare_restart'
arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter':
platform-spi_imx.c:(.text+0x22e4): undefined reference to `imx_set_cpu_jump'
arch/arm/mach-imx/built-in.o: In function `imx6q_init_irq':
platform-spi_imx.c:(.init.text+0x7280): undefined reference to `imx_src_init'
make[1]: *** [vmlinux] Error 1
Shawn Guo - Jan. 17, 2013, 10:59 a.m.
On Thu, Jan 17, 2013 at 12:55:43PM +0200, Artem Bityutskiy wrote:
> On Tue, 2013-01-15 at 16:56 +0100, Roman Schneider wrote:
> > ---
> >  Also compress the id in case of a v3 NAND flash controller (i.mx51, i.mx53)
> >  and 16Bit buswidth.
> 
> Unfortunately I cannot compile-test it with the configuration I have.
> This is not your fault, just a breakage in upstream. I'll wait when this

It's my fault.  Please see if patch [1] fixes the problem with your
configuration.

Shawn

[1] http://article.gmane.org/gmane.linux.ports.arm.kernel/209206

> is fixed upstream, and then take a look at your patch. The breakage is:
> 
> arch/arm/mach-imx/built-in.o: In function `imx6q_restart':
> platform-spi_imx.c:(.text+0x2220): undefined reference to `imx_src_prepare_restart'
> arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter':
> platform-spi_imx.c:(.text+0x22e4): undefined reference to `imx_set_cpu_jump'
> arch/arm/mach-imx/built-in.o: In function `imx6q_init_irq':
> platform-spi_imx.c:(.init.text+0x7280): undefined reference to `imx_src_init'
> make[1]: *** [vmlinux] Error 1
> 
> -- 
> Best Regards,
> Artem Bityutskiy
Fabio Estevam - Jan. 17, 2013, 11:16 a.m.
Hi Roman,

On Tue, Jan 15, 2013 at 1:56 PM, Roman Schneider <schneider@at.festo.com> wrote:
> ---
>  Also compress the id in case of a v3 NAND flash controller (i.mx51, i.mx53)
>  and 16Bit buswidth.

This should go above the --- line.

You also missed a Signed-off-by line.
Artem Bityutskiy - Jan. 17, 2013, 11:53 a.m.
On Tue, 2013-01-15 at 16:56 +0100, Roman Schneider wrote:
> ---
>  Also compress the id in case of a v3 NAND flash controller (i.mx51, i.mx53)
>  and 16Bit buswidth.

OK, I fixed the commit message and added your S-o-b, just like Fabio
noted, and pushed to l2-mtd.git, thanks!

Patch

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 45204e4..20e1241 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -530,12 +530,23 @@  static void send_page_v1(struct mtd_info *mtd, unsigned int ops)
 
 static void send_read_id_v3(struct mxc_nand_host *host)
 {
+	struct nand_chip *this = &host->nand;
+
 	/* Read ID into main buffer */
 	writel(NFC_ID, NFC_V3_LAUNCH);
 
 	wait_op_done(host, true);
 
 	memcpy32_fromio(host->data_buf, host->main_area0, 16);
+
+	if (this->options & NAND_BUSWIDTH_16) {
+		/* compress the ID info */
+		host->data_buf[1] = host->data_buf[2];
+		host->data_buf[2] = host->data_buf[4];
+		host->data_buf[3] = host->data_buf[6];
+		host->data_buf[4] = host->data_buf[8];
+		host->data_buf[5] = host->data_buf[10];
+	}
 }
 
 /* Request the NANDFC to perform a read of the NAND device ID. */