From patchwork Tue Jan 15 09:27:25 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 212094 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EBB3F2C0175 for ; Tue, 15 Jan 2013 21:56:43 +1100 (EST) Received: from localhost ([::1]:45204 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tv2ov-0003YN-C3 for incoming@patchwork.ozlabs.org; Tue, 15 Jan 2013 04:28:37 -0500 Received: from eggs.gnu.org ([208.118.235.92]:57899) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tv2oN-0002Md-Bw for qemu-devel@nongnu.org; Tue, 15 Jan 2013 04:28:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tv2oL-0000bu-8N for qemu-devel@nongnu.org; Tue, 15 Jan 2013 04:28:03 -0500 Received: from cantor2.suse.de ([195.135.220.15]:41027 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tv2oK-0000bh-W3 for qemu-devel@nongnu.org; Tue, 15 Jan 2013 04:28:01 -0500 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 8556BA5200; Tue, 15 Jan 2013 10:28:00 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Tue, 15 Jan 2013 10:27:25 +0100 Message-Id: <1358242058-1404-8-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1358242058-1404-1-git-send-email-afaerber@suse.de> References: <1358242058-1404-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno Subject: [Qemu-devel] [PATCH 07/20] exec: Return CPUState from qemu_get_cpu() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Move the declaration to qemu/cpu.h and add documentation. The implementation still depends on CPUArchState for CPU iteration. Signed-off-by: Andreas Färber --- exec.c | 6 +++--- hw/pxa2xx_gpio.c | 2 +- include/exec/cpu-all.h | 1 - include/qom/cpu.h | 10 ++++++++++ target-mips/op_helper.c | 11 ++++++++--- 5 Dateien geändert, 22 Zeilen hinzugefügt(+), 8 Zeilen entfernt(-) diff --git a/exec.c b/exec.c index e5265e6..5689613 100644 --- a/exec.c +++ b/exec.c @@ -247,10 +247,10 @@ static const VMStateDescription vmstate_cpu_common = { }; #endif -CPUArchState *qemu_get_cpu(int index) +CPUState *qemu_get_cpu(int index) { CPUArchState *env = first_cpu; - CPUState *cpu; + CPUState *cpu = NULL; while (env) { cpu = ENV_GET_CPU(env); @@ -260,7 +260,7 @@ CPUArchState *qemu_get_cpu(int index) env = env->next_cpu; } - return env; + return cpu; } void cpu_exec_init(CPUArchState *env) diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c index c02c295..eec2ea3 100644 --- a/hw/pxa2xx_gpio.c +++ b/hw/pxa2xx_gpio.c @@ -277,7 +277,7 @@ static int pxa2xx_gpio_initfn(SysBusDevice *dev) s = FROM_SYSBUS(PXA2xxGPIOInfo, dev); - s->cpu = arm_env_get_cpu(qemu_get_cpu(s->ncpu)); + s->cpu = ARM_CPU(qemu_get_cpu(s->ncpu)); qdev_init_gpio_in(&dev->qdev, pxa2xx_gpio_set, s->lines); qdev_init_gpio_out(&dev->qdev, s->handler, s->lines); diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 439e88d..249e046 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -354,7 +354,6 @@ int page_check_range(target_ulong start, target_ulong len, int flags); #endif CPUArchState *cpu_copy(CPUArchState *env); -CPUArchState *qemu_get_cpu(int cpu); #define CPU_DUMP_CODE 0x00010000 #define CPU_DUMP_FPU 0x00020000 /* dump FPU register state, not just integer */ diff --git a/include/qom/cpu.h b/include/qom/cpu.h index d5e0a40..773caf9 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -156,5 +156,15 @@ bool cpu_is_stopped(CPUState *cpu); */ void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data); +/** + * qemu_get_cpu: + * @index: The CPUState@cpu_index value of the CPU to obtain. + * + * Gets a CPU matching @index. + * + * Returns: The CPU or %NULL if there is no matching CPU. + */ +CPUState *qemu_get_cpu(int index); + #endif diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 1816a0e..1bca4a1 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -585,8 +585,9 @@ static inline void mips_tc_sleep(MIPSCPU *cpu, int tc) walking the list of CPUMIPSStates. */ static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc) { + MIPSCPU *cpu; CPUState *cs; - CPUMIPSState *other; + CPUState *other_cs; int vpe_idx; int tc_idx = *tc; @@ -599,8 +600,12 @@ static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc) cs = CPU(mips_env_get_cpu(env)); vpe_idx = tc_idx / cs->nr_threads; *tc = tc_idx % cs->nr_threads; - other = qemu_get_cpu(vpe_idx); - return other ? other : env; + other_cs = qemu_get_cpu(vpe_idx); + if (other_cs == NULL) { + return env; + } + cpu = MIPS_CPU(other_cs); + return &cpu->env; } /* The per VPE CP0_Status register shares some fields with the per TC