From patchwork Tue Jan 15 08:13:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [v3,5/9] ARM: tegra: Skip scu_enable(scu_base) if not Cortex A9 Date: Mon, 14 Jan 2013 22:13:14 -0000 From: Hiroshi Doyu X-Patchwork-Id: 212013 Message-Id: <1358237598-32413-6-git-send-email-hdoyu@nvidia.com> To: Cc: , , , Hiroshi Doyu Skip scu_enable(scu_base) if CPU is not Cortex A9. Signed-off-by: Hiroshi Doyu --- arch/arm/mach-tegra/platsmp.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index 689ee4b..e329e93 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -38,7 +38,6 @@ extern void tegra_secondary_startup(void); static cpumask_t tegra_cpu_init_mask; -static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE); #define EVP_CPU_RESET_VECTOR \ (IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100) @@ -184,10 +183,14 @@ static void __init tegra_smp_init_cpus(void) static void __init tegra_smp_prepare_cpus(unsigned int max_cpus) { + phys_addr_t base; + /* Always mark the boot CPU (CPU0) as initialized. */ cpumask_set_cpu(0, &tegra_cpu_init_mask); - scu_enable(scu_base); + base = scu_get_base(); + if (base) + scu_enable(IO_ADDRESS(base)); } struct smp_operations tegra_smp_ops __initdata = {