diff mbox

[v5,1/2] target-i386: define dr7 bit field

Message ID 1358228396-17552-2-git-send-email-lig.fnst@cn.fujitsu.com
State New
Headers show

Commit Message

liguang Jan. 15, 2013, 5:39 a.m. UTC
implictly use of dr7 bit field is a little hard
to understand, so try to define them and use the
defined name.

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
---
 target-i386/cpu.h         |    6 ++++++
 target-i386/machine.c     |    5 +++--
 target-i386/misc_helper.c |    4 ++--
 target-i386/seg_helper.c  |    9 +++++----
 4 files changed, 16 insertions(+), 8 deletions(-)

Comments

Andreas Färber Jan. 15, 2013, 8:28 a.m. UTC | #1
Am 15.01.2013 06:39, schrieb liguang:
> implictly use of dr7 bit field is a little hard
> to understand, so try to define them and use the
> defined name.
> 
> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> ---
>  target-i386/cpu.h         |    6 ++++++
>  target-i386/machine.c     |    5 +++--
>  target-i386/misc_helper.c |    4 ++--
>  target-i386/seg_helper.c  |    9 +++++----
>  4 files changed, 16 insertions(+), 8 deletions(-)
> 
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index 1283537..64fd7a5 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -231,6 +231,12 @@
>  #define DR7_TYPE_SHIFT  16
>  #define DR7_LEN_SHIFT   18
>  #define DR7_FIXED_1     0x00000400
> +#define DR7_LOCAL_BP_MASK    0x55
> +#define DR7_MAX_BP           4
> +#define DR7_TYPE_BP_INST     0x0
> +#define DR7_TYPE_DATA_WR     0x1
> +#define DR7_TYPE_IO_RW       0x2
> +#define DR7_TYPE_DATA_RW     0x3
>  
>  #define PG_PRESENT_BIT	0
>  #define PG_RW_BIT	1
> diff --git a/target-i386/machine.c b/target-i386/machine.c
> index 8354572..8df6a6b 100644
> --- a/target-i386/machine.c
> +++ b/target-i386/machine.c
> @@ -265,10 +265,11 @@ static int cpu_post_load(void *opaque, int version_id)
>  
>      cpu_breakpoint_remove_all(env, BP_CPU);
>      cpu_watchpoint_remove_all(env, BP_CPU);
> -    for (i = 0; i < 4; i++)
> +    for (i = 0; i < DR7_MAX_BP; i++) {
>          hw_breakpoint_insert(env, i);
> -
> +    }
>      tlb_flush(env, 1);
> +
>      return 0;
>  }
>  
> diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c
> index db3126b..9b0f7b3 100644
> --- a/target-i386/misc_helper.c
> +++ b/target-i386/misc_helper.c
> @@ -197,11 +197,11 @@ void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0)
>          env->dr[reg] = t0;
>          hw_breakpoint_insert(env, reg);
>      } else if (reg == 7) {
> -        for (i = 0; i < 4; i++) {
> +        for (i = 0; i < DR7_MAX_BP; i++) {
>              hw_breakpoint_remove(env, i);
>          }
>          env->dr[7] = t0;
> -        for (i = 0; i < 4; i++) {
> +        for (i = 0; i < DR7_MAX_BP; i++) {
>              hw_breakpoint_insert(env, i);
>          }
>      } else {
> diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
> index c2a99ee..3247dee 100644
> --- a/target-i386/seg_helper.c
> +++ b/target-i386/seg_helper.c
> @@ -465,13 +465,14 @@ static void switch_tss(CPUX86State *env, int tss_selector,
>  
>  #ifndef CONFIG_USER_ONLY
>      /* reset local breakpoints */
> -    if (env->dr[7] & 0x55) {
> -        for (i = 0; i < 4; i++) {
> -            if (hw_breakpoint_enabled(env->dr[7], i) == 0x1) {
> +    if (env->dr[7] & DR7_LOCAL_BP_MASK) {
> +        for (i = 0; i < DR7_MAX_BP; i++) {
> +            if (hw_local_breakpoint_enabled(env->dr[7], i) &&
> +                !hw_global_breakpoint_enabled(env->dr[7], i)) {

Does not build.

>                  hw_breakpoint_remove(env, i);
>              }
>          }
> -        env->dr[7] &= ~0x55;
> +        env->dr[7] &= ~DR7_LOCAL_BP_MASK;
>      }
>  #endif
>  }
>
diff mbox

Patch

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 1283537..64fd7a5 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -231,6 +231,12 @@ 
 #define DR7_TYPE_SHIFT  16
 #define DR7_LEN_SHIFT   18
 #define DR7_FIXED_1     0x00000400
+#define DR7_LOCAL_BP_MASK    0x55
+#define DR7_MAX_BP           4
+#define DR7_TYPE_BP_INST     0x0
+#define DR7_TYPE_DATA_WR     0x1
+#define DR7_TYPE_IO_RW       0x2
+#define DR7_TYPE_DATA_RW     0x3
 
 #define PG_PRESENT_BIT	0
 #define PG_RW_BIT	1
diff --git a/target-i386/machine.c b/target-i386/machine.c
index 8354572..8df6a6b 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -265,10 +265,11 @@  static int cpu_post_load(void *opaque, int version_id)
 
     cpu_breakpoint_remove_all(env, BP_CPU);
     cpu_watchpoint_remove_all(env, BP_CPU);
-    for (i = 0; i < 4; i++)
+    for (i = 0; i < DR7_MAX_BP; i++) {
         hw_breakpoint_insert(env, i);
-
+    }
     tlb_flush(env, 1);
+
     return 0;
 }
 
diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c
index db3126b..9b0f7b3 100644
--- a/target-i386/misc_helper.c
+++ b/target-i386/misc_helper.c
@@ -197,11 +197,11 @@  void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0)
         env->dr[reg] = t0;
         hw_breakpoint_insert(env, reg);
     } else if (reg == 7) {
-        for (i = 0; i < 4; i++) {
+        for (i = 0; i < DR7_MAX_BP; i++) {
             hw_breakpoint_remove(env, i);
         }
         env->dr[7] = t0;
-        for (i = 0; i < 4; i++) {
+        for (i = 0; i < DR7_MAX_BP; i++) {
             hw_breakpoint_insert(env, i);
         }
     } else {
diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index c2a99ee..3247dee 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -465,13 +465,14 @@  static void switch_tss(CPUX86State *env, int tss_selector,
 
 #ifndef CONFIG_USER_ONLY
     /* reset local breakpoints */
-    if (env->dr[7] & 0x55) {
-        for (i = 0; i < 4; i++) {
-            if (hw_breakpoint_enabled(env->dr[7], i) == 0x1) {
+    if (env->dr[7] & DR7_LOCAL_BP_MASK) {
+        for (i = 0; i < DR7_MAX_BP; i++) {
+            if (hw_local_breakpoint_enabled(env->dr[7], i) &&
+                !hw_global_breakpoint_enabled(env->dr[7], i)) {
                 hw_breakpoint_remove(env, i);
             }
         }
-        env->dr[7] &= ~0x55;
+        env->dr[7] &= ~DR7_LOCAL_BP_MASK;
     }
 #endif
 }