Patchwork ARM: imx: correct low-power mode setting

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Submitter Shawn Guo
Date Jan. 14, 2013, 2:15 p.m.
Message ID <1358172921-9863-1-git-send-email-shawn.guo@linaro.org>
Download mbox | patch
Permalink /patch/211791/
State New
Headers show

Comments

Shawn Guo - Jan. 14, 2013, 2:15 p.m.
The hardware reset value of bit CCM_CLPCR_LPM enables WAIT mode
(WAIT_UNCLOCKED) by default.  However this is undesirable because
WAIT mode should only be enabled when there is a driver managing
ARM clock gating.  Correct the initial power mode to WAIT_CLOCKED
(disable WAIT mode).  While at it, the power mode after resuming
is also set back to WAIT_CLOCKED from STOP_POWER_OFF.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/mach-imx/clk-imx6q.c |    3 +++
 arch/arm/mach-imx/pm-imx6q.c  |    1 +
 2 files changed, 4 insertions(+)

Patch

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 7f2c10c..c0c4e72 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -436,6 +436,9 @@  int __init mx6q_clocks_init(void)
 	for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
 		clk_prepare_enable(clk[clks_init_on[i]]);
 
+	/* Set initial power mode */
+	imx6q_set_lpm(WAIT_CLOCKED);
+
 	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
 	base = of_iomap(np, 0);
 	WARN_ON(!base);
diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c
index a17543d..ee42d20 100644
--- a/arch/arm/mach-imx/pm-imx6q.c
+++ b/arch/arm/mach-imx/pm-imx6q.c
@@ -41,6 +41,7 @@  static int imx6q_pm_enter(suspend_state_t state)
 		cpu_suspend(0, imx6q_suspend_finish);
 		imx_smp_prepare();
 		imx_gpc_post_resume();
+		imx6q_set_lpm(WAIT_CLOCKED);
 		break;
 	default:
 		return -EINVAL;