From patchwork Fri Jan 11 11:39:57 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 211311 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C4C772C022F for ; Fri, 11 Jan 2013 22:43:39 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TtcyB-00088T-FA; Fri, 11 Jan 2013 11:40:19 +0000 Received: from metis.ext.pengutronix.de ([2001:6f8:1178:4:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Ttcy7-00085b-00 for linux-arm-kernel@lists.infradead.org; Fri, 11 Jan 2013 11:40:15 +0000 Received: from ukl by metis.ext.pengutronix.de with local (Exim 4.72) (envelope-from ) id 1Ttcxz-00029j-Il; Fri, 11 Jan 2013 12:40:08 +0100 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: linux-arm-kernel@lists.infradead.org Date: Fri, 11 Jan 2013 12:39:57 +0100 Message-Id: <1357904397-8476-1-git-send-email-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 1.7.10.4 MIME-Version: 1.0 X-SA-Exim-Connect-IP: X-SA-Exim-Mail-From: ukl@pengutronix.de X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on metis.extern.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=4.0 tests=BAYES_00,NO_RELAYS shortcircuit=no autolearn=ham version=3.3.2 Subject: [PATCH] ARM: let CPUs not being able to run in ARM mode enter in THUMB mode X-SA-Exim-Version: 4.2.1 (built Mon, 22 Mar 2010 06:51:10 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130111_064015_361263_B868C8BC X-CRM114-Status: GOOD ( 14.32 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Some ARM cores are not capable to run in ARM mode (e.g. Cortex-M3). So obviously these cannot enter the kernel in ARM mode. Make an exception for them and let them enter in THUMB mode. Signed-off-by: Uwe Kleine-König --- arch/arm/kernel/head-nommu.S | 8 +++++++- arch/arm/kernel/head.S | 8 +++++++- arch/arm/mm/Kconfig | 6 ++++++ 3 files changed, 20 insertions(+), 2 deletions(-) diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S index 3782320..ae7ed46 100644 --- a/arch/arm/kernel/head-nommu.S +++ b/arch/arm/kernel/head-nommu.S @@ -32,15 +32,21 @@ * numbers for r1. * */ - .arm __HEAD + +#ifdef CONFIG_THUMBONLY_CPU + .thumb +ENTRY(stext) +#else + .arm ENTRY(stext) THUMB( adr r9, BSYM(1f) ) @ Kernel is always entered in ARM. THUMB( bx r9 ) @ If this is a Thumb-2 kernel, THUMB( .thumb ) @ switch to Thumb now. THUMB(1: ) +#endif setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode @ and irqs disabled diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 4eee351..0af2749 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -73,15 +73,21 @@ * crap here - that's what the boot loader (or in extreme, well justified * circumstances, zImage) is for. */ - .arm __HEAD + +#ifdef CONFIG_THUMBONLY_CPU + .thumb +ENTRY(stext) +#else + .arm ENTRY(stext) THUMB( adr r9, BSYM(1f) ) @ Kernel is always entered in ARM. THUMB( bx r9 ) @ If this is a Thumb-2 kernel, THUMB( .thumb ) @ switch to Thumb now. THUMB(1: ) +#endif #ifdef CONFIG_ARM_VIRT_EXT bl __hyp_stub_install diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 3fd629d..bc3150c 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -1,5 +1,11 @@ comment "Processor Type" +# Select this if your CPU doesn't support the 32 bit ARM instructions. +config THUMBONLY_CPU + bool + select THUMB2_KERNEL + select ARM_THUMB + # Select CPU types depending on the architecture selected. This selects # which CPUs we support in the kernel image, and the compiler instruction # optimiser behaviour.