Patchwork [AArch64] Make <su>mull<q> target tests more robust.

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Submitter Tejas Belagod
Date Jan. 8, 2013, 2:27 p.m.
Message ID <50EC2CB7.7060609@arm.com>
Download mbox | patch
Permalink /patch/210404/
State New
Headers show

Comments

Tejas Belagod - Jan. 8, 2013, 2:27 p.m.
Hi,

Attached is a patch that makes the test case for <su>mull<q> more robust by 
looking for {scan-assembler "smull v[0-9]+\.<type>}" where <type> = {8h,
4s, 2d} and "smull2 v[0-9]+\.<type>}" where <type> = {8h, 4s, 2d} instead of 
looking for a specific number of occurances of "smull v" which can vary with the 
vectorization factor.

Tested on aarch64-4.7-branch and trunk for aarch64-none-elf. OK to commit on 
aarch64-4.7-branch and trunk?

Thanks,
Tejas Belagod
ARM.

2013-01-08  Tejas Belagod  <tejas.belagod@arm.com>

testsuite/
	* gcc.target/aarch64/vect-mull-compile.c: Explicitly scan for
	instructions generated instead of number of occurances.
Marcus Shawcroft - Jan. 8, 2013, 2:50 p.m.
OK
/Marcus

On 8 January 2013 14:27, Tejas Belagod <tbelagod@arm.com> wrote:
>
> Hi,
>
> Attached is a patch that makes the test case for <su>mull<q> more robust by
> looking for {scan-assembler "smull v[0-9]+\.<type>}" where <type> = {8h,
> 4s, 2d} and "smull2 v[0-9]+\.<type>}" where <type> = {8h, 4s, 2d} instead of
> looking for a specific number of occurances of "smull v" which can vary with
> the vectorization factor.
>
> Tested on aarch64-4.7-branch and trunk for aarch64-none-elf. OK to commit on
> aarch64-4.7-branch and trunk?
>
> Thanks,
> Tejas Belagod
> ARM.
>
> 2013-01-08  Tejas Belagod  <tejas.belagod@arm.com>
>
> testsuite/
>         * gcc.target/aarch64/vect-mull-compile.c: Explicitly scan for
>         instructions generated instead of number of occurances.
> diff --git a/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
> b/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
> index e51eaee..e90c97f 100644
> --- a/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
> +++ b/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
> @@ -10,7 +10,15 @@ DEF_MULL2 (DEF_MULLB)
>  DEF_MULL2 (DEF_MULLH)
>  DEF_MULL2 (DEF_MULLS)
>
> -/* { dg-final { scan-assembler-times "smull v" 3 } } */
> -/* { dg-final { scan-assembler-times "smull2 v" 3 } } */
> -/* { dg-final { scan-assembler-times "umull v" 3 } } */
> -/* { dg-final { scan-assembler-times "umull2 v" 3 } } */
> +/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.8h"} } */
> +/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.4s"} } */
> +/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.2d"} } */
> +/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.8h"} } */
> +/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.4s"} } */
> +/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.2d"} } */
> +/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.8h"} } */
> +/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.4s"} } */
> +/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.2d"} } */
> +/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.8h"} } */
> +/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.4s"} } */
> +/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.2d"} } */

Patch

diff --git a/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c b/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
index e51eaee..e90c97f 100644
--- a/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
+++ b/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
@@ -10,7 +10,15 @@  DEF_MULL2 (DEF_MULLB)
 DEF_MULL2 (DEF_MULLH)
 DEF_MULL2 (DEF_MULLS)
 
-/* { dg-final { scan-assembler-times "smull v" 3 } } */
-/* { dg-final { scan-assembler-times "smull2 v" 3 } } */
-/* { dg-final { scan-assembler-times "umull v" 3 } } */
-/* { dg-final { scan-assembler-times "umull2 v" 3 } } */
+/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.8h"} } */
+/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.2d"} } */
+/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.8h"} } */
+/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.2d"} } */
+/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.8h"} } */
+/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.2d"} } */
+/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.8h"} } */
+/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.2d"} } */