From patchwork Tue Jan 8 13:14:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [29/32] usb/ehci: Add SysBus EHCI device for Exynos4210 Date: Tue, 08 Jan 2013 03:14:51 -0000 From: Gerd Hoffmann X-Patchwork-Id: 210378 Message-Id: <1357650894-16982-30-git-send-email-kraxel@redhat.com> To: qemu-devel@nongnu.org Cc: Igor Mitsyanko , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Liming Wang , Gerd Hoffmann From: Andreas Färber It uses a different capsbase and opregbase than the Xilinx device. Signed-off-by: Liming Wang Signed-off-by: Andreas Färber Cc: Igor Mitsyanko Signed-off-by: Gerd Hoffmann --- hw/usb/hcd-ehci-sysbus.c | 15 +++++++++++++++ hw/usb/hcd-ehci.h | 2 ++ 2 files changed, 17 insertions(+), 0 deletions(-) diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c index 5a94ce3..b68a66a 100644 --- a/hw/usb/hcd-ehci-sysbus.c +++ b/hw/usb/hcd-ehci-sysbus.c @@ -81,10 +81,25 @@ static const TypeInfo ehci_xlnx_type_info = { .class_init = ehci_xlnx_class_init, }; +static void ehci_exynos4210_class_init(ObjectClass *oc, void *data) +{ + SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc); + + sec->capsbase = 0x0; + sec->opregbase = 0x10; +} + +static const TypeInfo ehci_exynos4210_type_info = { + .name = TYPE_EXYNOS4210_EHCI, + .parent = TYPE_SYS_BUS_EHCI, + .class_init = ehci_exynos4210_class_init, +}; + static void ehci_sysbus_register_types(void) { type_register_static(&ehci_type_info); type_register_static(&ehci_xlnx_type_info); + type_register_static(&ehci_exynos4210_type_info); } type_init(ehci_sysbus_register_types) diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h index 2b0b5a1..e95bb7e 100644 --- a/hw/usb/hcd-ehci.h +++ b/hw/usb/hcd-ehci.h @@ -337,6 +337,8 @@ typedef struct EHCIPCIState { #define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb" +#define TYPE_EXYNOS4210_EHCI "exynos4210-ehci-usb" + #define SYS_BUS_EHCI(obj) \ OBJECT_CHECK(EHCISysBusState, (obj), TYPE_SYS_BUS_EHCI) #define SYS_BUS_EHCI_CLASS(class) \