From patchwork Mon Jan 7 15:38:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 209971 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 479A52C0090 for ; Tue, 8 Jan 2013 03:15:31 +1100 (EST) Received: from localhost ([::1]:52314 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TsEnr-0005RC-48 for incoming@patchwork.ozlabs.org; Mon, 07 Jan 2013 10:39:55 -0500 Received: from eggs.gnu.org ([208.118.235.92]:41136) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TsEnL-0004wq-SB for qemu-devel@nongnu.org; Mon, 07 Jan 2013 10:39:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TsEnH-0007BC-8g for qemu-devel@nongnu.org; Mon, 07 Jan 2013 10:39:23 -0500 Received: from cantor2.suse.de ([195.135.220.15]:39911 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TsEnG-0007B3-Ur; Mon, 07 Jan 2013 10:39:19 -0500 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 6A4C2A51F4; Mon, 7 Jan 2013 16:39:18 +0100 (CET) From: Alexander Graf To: qemu-devel@nongnu.org Date: Mon, 7 Jan 2013 16:38:49 +0100 Message-Id: <1357573140-8877-21-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1357573140-8877-1-git-send-email-agraf@suse.de> References: <1357573140-8877-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Blue Swirl , Scott Wood , qemu-ppc@nongnu.org, Aurelien Jarno Subject: [Qemu-devel] [PATCH 20/31] openpic: use standard bitmap operations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Scott Wood Besides the private implementation being redundant, namespace collisions prevented the use of other things in bitops.h. Serialization does get a bit more awkward, unfortunately, since the standard bitmap operations are "unsigned long" rather than "uint32_t", though in exchange we will get faster queue lookups on 64-bit hosts once we search a word at a time. Signed-off-by: Scott Wood Signed-off-by: Alexander Graf --- hw/openpic.c | 55 +++++++++++++++++++++++++++++-------------------------- 1 files changed, 29 insertions(+), 26 deletions(-) diff --git a/hw/openpic.c b/hw/openpic.c index 2c238fb..b54308d 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -39,6 +39,7 @@ #include "openpic.h" #include "sysbus.h" #include "pci/msi.h" +#include "qemu/bitops.h" //#define DEBUG_OPENPIC @@ -147,24 +148,6 @@ static const int debug_openpic = 0; #define MSIIR_IBS_SHIFT 24 #define MSIIR_IBS_MASK (0x1f << MSIIR_IBS_SHIFT) -#define BF_WIDTH(_bits_) \ -(((_bits_) + (sizeof(uint32_t) * 8) - 1) / (sizeof(uint32_t) * 8)) - -static inline void set_bit(uint32_t *field, int bit) -{ - field[bit >> 5] |= 1 << (bit & 0x1F); -} - -static inline void reset_bit(uint32_t *field, int bit) -{ - field[bit >> 5] &= ~(1 << (bit & 0x1F)); -} - -static inline int test_bit(uint32_t *field, int bit) -{ - return (field[bit >> 5] & 1 << (bit & 0x1F)) != 0; -} - static int get_current_cpu(void) { if (!cpu_single_env) { @@ -180,7 +163,10 @@ static void openpic_cpu_write_internal(void *opaque, hwaddr addr, uint32_t val, int idx); typedef struct IRQQueue { - uint32_t queue[BF_WIDTH(MAX_IRQ)]; + /* Round up to the nearest 64 IRQs so that the queue length + * won't change when moving between 32 and 64 bit hosts. + */ + unsigned long queue[BITS_TO_LONGS((MAX_IRQ + 63) & ~63)]; int next; int priority; } IRQQueue; @@ -268,17 +254,17 @@ typedef struct OpenPICState { static inline void IRQ_setbit(IRQQueue *q, int n_IRQ) { - set_bit(q->queue, n_IRQ); + set_bit(n_IRQ, q->queue); } static inline void IRQ_resetbit(IRQQueue *q, int n_IRQ) { - reset_bit(q->queue, n_IRQ); + clear_bit(n_IRQ, q->queue); } static inline int IRQ_testbit(IRQQueue *q, int n_IRQ) { - return test_bit(q->queue, n_IRQ); + return test_bit(n_IRQ, q->queue); } static void IRQ_check(OpenPICState *opp, IRQQueue *q) @@ -1117,8 +1103,16 @@ static void openpic_save_IRQ_queue(QEMUFile* f, IRQQueue *q) { unsigned int i; - for (i = 0; i < BF_WIDTH(MAX_IRQ); i++) - qemu_put_be32s(f, &q->queue[i]); + for (i = 0; i < ARRAY_SIZE(q->queue); i++) { + /* Always put the lower half of a 64-bit long first, in case we + * restore on a 32-bit host. The least significant bits correspond + * to lower IRQ numbers in the bitmap. + */ + qemu_put_be32(f, (uint32_t)q->queue[i]); +#if LONG_MAX > 0x7FFFFFFF + qemu_put_be32(f, (uint32_t)(q->queue[i] >> 32)); +#endif + } qemu_put_sbe32s(f, &q->next); qemu_put_sbe32s(f, &q->priority); @@ -1160,8 +1154,17 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q) { unsigned int i; - for (i = 0; i < BF_WIDTH(MAX_IRQ); i++) - qemu_get_be32s(f, &q->queue[i]); + for (i = 0; i < ARRAY_SIZE(q->queue); i++) { + unsigned long val; + + val = qemu_get_be32(f); +#if LONG_MAX > 0x7FFFFFFF + val <<= 32; + val |= qemu_get_be32(f); +#endif + + q->queue[i] = val; + } qemu_get_sbe32s(f, &q->next); qemu_get_sbe32s(f, &q->priority);